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CHL8515_15 Datasheet, PDF (13/16 Pages) International Rectifier – High‐Efficiency Variable Gate MOSFET Driver
High‐Efficiency Variable Gate MOSFET Driver CHL8515
APPLICATION INFORMATION
BOOT STRAP CIRCUIT
Once the high‐side MOSFET selection is made, the
bootstrap circuit can be defined. The integrated boot
diode of the CHL8515 reduces the external component
count for use in cost and space sensitive designs. For ultra
high efficiency designs, an external boot strap diode is
recommended.
The bootstrap capacitor CBoot stores the charge and
provides the voltage required to drive the external high‐
side MOSFET gate. The minimum capacitor value can be
defined by:
CBoot = QHS MOSFET_gate / ∆VBoot
where,
 QHS MOSFET_gate is the total gate charge of the
high‐side external MOSFET(s)
 ∆VBoot is the droop allowed on the boot capacitor
voltage (at the high‐side MOSFET gate)
A series resistor, 1Ω to 4Ω, may be added to customize the
rise time of the high‐side output. Slowing down this output
allows setting the phase node rising slew rate and limits
the surge current into the boot capacitor on start‐up.
ADJUSTABLE OVER TEMPERATURE
In high density multiphase VR solutions, the MOSFET driver
is often located very close to the MOSFETS. Differences in
temperature that occurs from phase to phase in a system
can occur due to mis‐matched thermal solutions, airflow,
surrounding components or manufacturing errors and can
often cause poor efficiency or even system failures if not
monitored.
The CHL8515 utilizes the MOSFET Driver die temperature
as an indicator of the overall temperature of each phase.
The OTSET feature allows the user to vary the OT# flag
indicator from 61ºC to 150ºC using a simple resistor.
The equation defining the overtemperature setpoint, OTSET
as a function of RSET (Figure 6) is:
OTSET 150C  89C  38k
38k  RSET
The resistor RSET is therefore calculated as:
RSET  38k 89C  38k
150C  OTSET
Leaving the OTSET pin open will cause the system to use the
default 150ºC setpoint. A 1% or better resistor should be
used for the best accuracy. Figure 7 shows the values of
RSET chosen as a function of the desired overtemperature
setpoint.
Figure 8: Choosing Overtemperature using RSET
The OT# flag an open drain signal and is active low as the
temperature of the CHL8515 die exceeds the OTSET point.
The user can monitor one or all phases, or tie the phases
together and to a system level enable to implement an
over‐temperature shutdown feature in the VR solution.
SUPPLY DECOUPLING CAPACITOR
VCC decoupling to the IR3598 is provided by a 0.1µF
bypass capacitor CVcc located close to the supply input pin.
A series resistor Rvcc, typically 10Ω, is added in series with
the supply voltage to filter high frequency ringing and
noise. A 1.0µF or higher capacitor is recommended for the
VDRV decoupling capacitor, CDRV.
13 December 6, 2011 | FINAL | V1.05