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CHL8515_15 Datasheet, PDF (11/16 Pages) International Rectifier – High‐Efficiency Variable Gate MOSFET Driver | |||
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HighâEfficiency Variable Gate MOSFET Driver CHL8515
THEORY OF OPERATION
POWERâON RESET (POR)
The CHL8515 incorporates a powerâon reset feature.
This ensures that both the highâ and lowâside output
drivers are made active only after the device supply
voltage has exceeded a certain minimum operating
threshold. The Vcc and Vdrv supply is monitored and both
the drivers are set to the low state, holding both external
MOSFETs off. Once Vcc and Vdrv crosses the rising POR
threshold, the CHL8515 is reset and the outputs are held in
the low state until a transition from triâstate to active
operation is detected at the PWM input. During normal
operation the drivers continue to remain active until the
Vcc and Vdrv falls below the falling POR threshold.
INTEGRATED BOOTSTRAP DIODE
The CHL8515 features an integrated bootstrap diode
to reduce external component count. This enables the
CHL8515 to be used effectively in cost and space sensitive
designs.
The bootstrap circuit is used to establish the gate voltage
for the highâside driver. It consists of a diode and capacitor
connected between the SWITCH and BOOT pins of the
device. Integrating the diode within the CHL8515,
results in the need for an external boot capacitor only.
The bootstrap capacitor is charged through the diode
and injects this charge into the highâside MOSFET input
capacitance when PWM signal goes high.
IR ACTIVE TRIâLEVEL (ATL) PWM INPUT SIGNAL
The CHL8515 gate drivers are driven by a patented triâlevel
PWM control signal provided by the IR digital PWM
controllers. During normal operation, the rising and falling
edges of the PWM signal transitions between 0V and 1.8V
to switch the LO_GATE and HI_GATE. To force both driver
outputs low simultaneously, the PWM signal crosses a
triâstate voltage level higher than the triâstate HI_GATE
threshold. This threshold based triâstate results in a very
fast disable for both the drivers, with only a small triâstate
propagation delay. MOSFET switching resumes when the
PWM signal falls below the triâstate threshold into the
normal operating voltage range.
This fast triâstate operation eliminates the need for any
triâstate holdâoff time of the PWM signal to dwell in the
shutdown window. Dedicated disable or enable pins are
not required which simplifies the routing and layout in
applications with a limited number of board layers. It also
provides switching free of shoot through for slow PWM
transition times of up to 20ns. The CHL8515 is therefore
tolerant of stray capacitance on the PWM signal lines.
The CHL8515 provides a 1.0mA typical pullâup current to
drive the PWM input to the triâstate condition of 3.3V
when the PWM controller output is in its high impedance
state. The 1.0mA typical current is designed for driving
worst case stray capacitances and transition the CHL8515
into the triâstate condition rapidly to avoid a prolonged
period of conduction of the highâ or lowâside MOSFETs
during faults. Immediately after the driver is driven into
the triâstate mode, the 1mA current is disables such that
power is conserved.
DIODE EMULATION DURING LOAD RELEASE
One advantage of this fast triâstate scheme is the ability
to quickly turnâoff all lowâside MOSFETs during a load
release event. This is known as diode emulation since all
the load current is forced to flow momentarily through the
body diodes of the MOSFETs. This results in a much lower
overshoot on the output voltage as can be seen in Figure 7
below.
I_out 105A to 10A
V_out without diode emulation
Overshoots ~25mV over 0A level
V_out with Diode Emulation
Overshoot within 0A level
Results in reduction of 30mV
overshoot
Figure 7: Output Voltage Overshoot Reduction
with Diode Emulation
START UP
During initial startup, the CHL8515 holds both highâ and
lowâside drivers low even after POR threshold is reached.
This mode is maintained while the PWM signal is pulled
to the triâstate threshold level greater than the triâstate
HI_GATE threshold and until it transitions out of triâstate.
It is this initial transition out of the triâstate which enables
both drivers to switch based on the normal PWM voltage
levels.
11 December 6, 2011 | FINAL | V1.05
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