CHL8505 Datasheet, PDF (1/15 Pages) International Rectifier – High.Efficiency 5V MOSFET Gate Driver

High‐Efficiency 5V MOSFET Gate Driver _CHL8505
FEATURES
 Ideal for Server Memory applications using +5V
 Fixed 5V Gate Drive
 Large drivers designed to drive 3nF in < 15ns
with +5V drive
 Low‐side driver – 2A source/4A sink
 High‐side driver – 2A source/2A sink
 Transitions times & Propagation delays < 15ns
 Integrated bootstrap diode
 Capable of high switching frequencies from 200kHz
up to greater than 1MHz
 Compatible with IR’s patented Active Tri‐Level
(ATL) PWM for fastest response to transient
overshoot
 Non‐overlap and under voltage protection
 Thermally enhanced 10‐pin DFN package
 Lead free RoHS compliant package
 Low Quiescent power to optimize efficiency
APPLICATIONS
 Multiphase synchronous buck converter for Server
CPUs and DDR Memory VR solutions
 High efficiency and compact VRM
 Optimized for Sleep state S3 systems using +5VSB
 Notebook Computer and Graphics VR solutions
DESCRIPTION
The CHL8505 MOSFET is a high‐efficiency gate driver which
can switch both high‐side and low‐side N‐channel external
MOSFETs in a synchronous buck converter. It is intended
for use with IR Digital PWM controllers to provide a total
voltage regulator (VR) solution for today’s advanced
computing applications.
The CHL8505 driver is capable of rapidly switching large
MOSFETs with low R_dson and large input capacitance used
in high‐efficiency designs. It is uniquely designed to
operate from a 5V source such as a system 5V or 5V
standby voltages in sleep states.
The CHL8505 has a unique circuit which improves drive
strength to the external MOSFETs even with just 5V
supplied at the VDRV pin. This insures faster switching
comparable to drivers designed for +12V drive operation.
The integrated boot diode reduces external component
count. The CHL8505 also features an adaptive non‐overlap
control for shoot‐through protection.
The CHL8505 is configured to drive both the high and low‐
side switches from the patented IR fast Active Tri‐Level
(ATL) PWM signal, which will optimize the turn off time of
individual phases, optimizing transient performance.
BASIC APPLICATION
PIN DIAGRAM
PWM 1
VCC 2
VDRV 3
NC 4
BOOT 5
Top View
GND
Pin 11
3x3 DFN
10 NC
9 NC
8 LO_GATE
7 SWITCH
6 HI_GATE
Figure 1: CHL8505 Basic Application Circuit
Figure 2: CHL8505 Package Top View
1 December 6, 2011 | FINAL | V1.05