X9251 Datasheet, PDF (9/22 Pages) Xicor Inc. – Quad Digitally-Controlled (XDCP) Potentiometer

Figure 2. Two-Byte Instruction Sequence
X9251
CS
SCK
SI
0 1 0 10
ID3 ID2 ID1 ID0 0
Device ID
0
0 ^{A1 A0} I3 I2 I1 I0 RB RA P1 P0
Internal
Address
Instruction
Opcode
Register DCP/WCR
Address Address
Figure 3. Three-Byte Instruction Sequence SPI Interface; Write Case
CS
SCK
SI
0 1 0 1 00
ID3 ID2 ID1 ID0 _{0 0 A1 A0}
I3 I2 I1 I0 RB RA ^P1 P0
D7 D6 D5 D4 D3 D2 D1 D0
Device ID
Internal
Address
Instruction
Opcode
Register DCP/WCR
Address Address
Data for WCR[7:0] or DR[7:0]
Figure 4. Three-Byte Instruction Sequence SPI Interface, Read Case
CS
SCK
SI
0 1 0 1 00
ID3 ID2 ID1 ID0 _{0 0} A1 A0
I3 I2 I1 I0 RB RA P1 P0
XXXX XXXX
Don’t Care
Device ID
Internal
Address
Instruction RegisterDCP/WCR
Opcode
Address Address
S0
D7 D6 D5 D4 D3 D2 D1 D0
WCR[7:0]
or
Data Register Bit [7:0]
9
FN8166.2
September 14, 2005