LP3907 Datasheet, PDF (9/44 Pages) National Semiconductor (TI) – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface

I/O Electrical Characteristics
Unless otherwise noted: Typical values and limits appearing in normal type apply for T_J = 25°C. Limits appearing in boldface
type apply over the entire junction temperature range for operation, T_J = 0°C to +125°C. (Note 13)
Symbol
Parameter
Conditions
Limit
Min
Max
Units
V_IL
Input Low Level
V_IH
Input High Level
0.4
V
1.2
V
Power On Reset Threshold/Function (POR)
Symbol
nPOR
nPOR
threshold
VOL
Parameter
nPOR = Power on reset forBuck1 and
Buck2
Percentage of Target voltage Buck1 or
Buck2
Output Level Low
Default
Conditions
V_BUCK1 AND V_BUCK2 rising
V_BUCK1 OR V_BUCK2 falling
Load = IoL = 500mA
Min
Typ Max Units
50
ms
94
%
85
0.23
0.5
V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J = 160°C (typ.) and disengages at T_J
= 140°C (typ.)
Note 4: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MILSTD - 883 3015.7)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power
dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (θ_JA), as given by the
following equation: T_A-MAX = T_J-MAX-OP − (θ_JA × P_D-MAX). See Applications section.
Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: C_IN, C_OUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 9: The device maintains a stable, regulated output voltage without a load.
Note 10: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100mV below its nominal value.
Note 11: Quiescent current is defined here as the difference in current between the input voltage source and the load at V_OUT.
Note 12: V_IN minimum for line regulation values is 1.8V.
Note 13: This specification is guaranteed by design.
Note 14: The I_Q can be defined as the standing current of the LP3907 when the I²C bus is active and all other power blocks have been disabled via the I²C
bus, or it can be defined as the I²C bus active, and the other power blocks are active under no load condition. These two values can be used by the system
designer when the LP3907 is powered using a battery.
Note 15: Pins 24, 19 can operate from V_IN min of 1.74 to a V_IN max of 5.5V. This rating is only for the series pass PMOS power FET. It allows the system design
to use a lower voltage rating if the input voltage comes from a buck output.
Note 16: The I_Q exhibits a higher current draw when the EN pin is de-asserted because the I²2 buffer pins draw an additional 2µA.
Note 17: VPOR is voltage at which the EPROM resets. This is different from the UVLO on VINLDO12, which is the voltage at which the regulators shut off; and
is also different from the nPOR function, which signals if the regulators are in a specified range.
≥ Note 18: Buck V_IN V_OUT + 1V.
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