ISL78310_15 Datasheet, PDF (9/14 Pages) Intersil Corporation – High Performance 1A LDO

ISL78310
Typical Operating Performance Unless otherwise noted: V_IN = 2.2V, V_OUT = 1.8V, C_IN = C_OUT = 10µF, T_J = +25°C,
I_L = 0A. (Continued)
10
1
0.1
0.01
I_LOAD = 1A
0.001
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 12. SPECTRAL NOISE DENSITY vs FREQUENCY
Applications Information
Input Voltage Requirements
The ISL78310 is capable of delivering output voltages from 0.8V
to 5.0V. Due to the nature of an LDO, V_IN must be some margin
higher than the output voltage plus dropout at the maximum
rated current of the application if active filtering (PSRR) is
expected from V_IN to V_OUT. The generous dropout specification of
this family of LDOs allows applications to design for a level of
efficiency that can accommodate profiles smaller than the
TO220/263.
External Capacitor Requirements
GENERAL GUIDELINE
External capacitors are required for proper operation. Careful
attention must be paid to layout guidelines and selection of
capacitor type and value to ensure optimal performance.
OUTPUT CAPACITOR
The ISL78310 applies state of the art internal compensation to
keep the selection of the output capacitor simple for the
customer. Stable operation over full temperation, V_IN range, V_OUT
range and load extremes are guaranteed for all capacitor types
and values assuming a minimum of 10µF X5R/X7R is used for
local bypass on V_OUT. This output capacitor must be connected to
the V_OUT and GND pins of the LDO with PCB traces no longer than
0.5cm. Additional capacitors of any value in ceramic, POSCAP,
alum/tantalum electrolytic types may be placed in parallel to
improve PSRR at higher frequencies and/or load transient AC
output voltage tolerances.
INPUT CAPACITOR
For proper operation, a minimum capacitance of 10µF X5R/X7R
is required at the input. This ceramic input capacitor must be
connected to V_IN and GND pins of the LDO with PCB traces no
longer than 0.5cm.
Phase Boost Capacitor (C_PB)
A small phase boost capacitor, CPB, can be placed across the top
resistor in the feedback resistor divider network (Figure 13) in
order to place a zero at:
F_Z = 1  2  pi  R_TOP  C_PB
(EQ. 1)
This zero increases the crossover frequency of the LDO and
provides additional phase resulting in faster load transient
response.
VIN
EN
CIN
SS
ISL78310
VOUT
PG
ADJ
RTOP
CPB
COUT
RBOTTOM
FIGURE 13.
It is also important to note that the LDO stability and load transient
are affected by the type of output capacitor used. For optimal
result, empirical tuning of C_PB is suggested for each specific
application. It is recommended to not use C_PB when high ESR
capacitors such as aluminum electrolytic or tantalum are used.
Table 1 shows the recommended C_PB, R_TOP, R_BOTTOM and C_PB
values for different output voltage rails.
Submit Document Feedback
9
FN7810.2
November 7, 2014