ISL6524A Datasheet, PDF (9/16 Pages) Intersil Corporation – VRM8.5 PWM and Triple Linear Power System Controller

current increases through the inductor (L_OUT1). At time T1,
the OC1 comparator trips when the voltage across Q1 (i_D •
r_DS(ON)) exceeds the level programmed by R_OCSET. This
inhibits outputs 1, 2, and 3, discharges the soft-start capacitor
C_SS24 with 28µA current sink, and increments the counter.
Soft-start capacitor C_SS13 is quickly discharged. C_SS13 starts
ramping up at T2 and initiates a new soft-start cycle. With
OUT2 still overloaded, the inductor current increases to trip
the over-current comparator. Again, this inhibits the outputs,
but the C_SS24 soft-start voltage continues increasing to above
4.0V before discharging. Soft-start capacitor C_SS13 is, again,
quickly discharged. The counter increments to 2. The soft-
start cycle repeats at T3 and trips the over-current
comparator. The SS24 pin voltage increases to above 4.0V at
T4 and the counter increments to 3. This sets the fault latch to
disable the converter.
10V
0V
COUNT
=1
4V
2V
0V
FAULT
REPORTED
COUNT
=2
COUNT
=3
OVERLOAD
APPLIED
0A
T0 T1
T2
T3 T4
TIME
FIGURE 8. OVER-CURRENT OPERATION
The three linear controllers monitor their respective VSEN
pins for under-voltage. Should excessive currents cause
VSEN3 or VSEN4 to fall below the linear under-voltage
threshold, the respective UV signals set the OC latch or the
FAULT latch, providing respective C_SS capacitors are fully
charged. Blanking the UV signals during the C_SS charge
interval allows the linear outputs to build above the under-
voltage threshold during normal operation. Cycling the bias
input power off then on resets the counter and the fault latch.
An external resistor (R_OCSET) programs the over-current trip
level for the PWM converter. As shown in Figure 9, the internal
200µA current sink (I_OCSET) develops a voltage across
R_OCSET (V_SET) that is referenced to V_IN. The DRIVE signal
enables the over-current comparator (OC). When the voltage
across the upper MOSFET (V_DS(ON)) exceeds V_SET, the over-
current comparator trips to set the over-current latch. Both
V_SET and V_DS are referenced to V_IN and a small capacitor
9
across R_OCSET helps V_OCSET track the variations of V_IN due
to MOSFET switching. The over-current function will trip at a
peak inductor current (I_PEAK) determined by:
I_PEAK
=
I_{--O-----C----S----E----T-----}×_----R_{-----O----C-----S----E---T--}
r_DS(ON)
The OC trip point varies with MOSFET’s rDS(ON)
temperature variations. To avoid over-current tripping in the
normal operating load range, determine the ROCSET
resistor value from the equation above with:
1. The maximum r_DS(ON) at the highest junction temperature
2. The minimum I_OCSET from the specification table
3. Determine I_PEAK for I_PEAK > I_OUT(MAX) + (∆I) / 2,
where ∆I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
OVER-CURRENT TRIP:
VDS > VSET
iD × rDS_(ON) > IOCSET × ROCSET
OCSET
V_IN = +5V
R_OCSET
+
-
OC
I_OCSET
200µA
DRIVE
V_{SET +}
VCC
UGATE
i_D
+
V_DS
PHASE
PWM
GATE
CONTROL
VPHASE = VIN – VDS
VOCSET = VIN – VSET
FIGURE 9. OVER-CURRENT DETECTION
OUT1 Voltage Program
The output voltage of the PWM converter is programmed to
discrete levels between 1.050V and 1.825V. This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, since they are internally
pulled to the VAUX pin through 5kΩ resistors. Changing the
VID inputs during operation is not recommended and could
toggle the PGOOD signal and exercise the over-voltage
protection. The output voltage program is Intel VRM8.5
compatible.
FN9064.1
April 8, 2005