ISL6410 Datasheet, PDF (9/13 Pages) Intersil Corporation – Single Synchronous Buck Regulators with Integrated FET

ISL6410, ISL6410A
Layout Considerations
As in all switching power supplies, the layout is an important
step in the design process, more so at high peak currents
and switching frequencies. Improper layout practice will give
rise to Stability and EMI issues. It is recommended that wide
and short traces are used for the main current paths. The
input capacitor should be placed as close as possible to the
IC pins. This applies to the output inductor and capacitor as
well. The analog ground, GND, and the power ground,
PGND, need to be separated. Use a common ground node
to minimize the effects of ground noise.
Performance Curves and Waveforms
100
VOUT = 1.8V
90
VOUT = 1.5V
VOUT = 1.2V
80
70
60
50
50
100
IOUT LOAD CURRENT (mA)
1000
FIGURE 4. ISL6410 EFFICIENCY vs LOAD CURRENT
100
IOUT = 200mA
90
IOUT = 600mA
80
70
60
50
2.9
3.1
3.3
3.5
VIN INPUT VOLTAGE (V)
FIGURE 5. ISL6410 VIN vs EFFICIENCY
100
VOUT = 3.3V
90
VOUT = 1.8V
80
VOUT = 1.2V
70
60
50
50
100
IOUT LOAD CURRENT (mA)
1000
FIGURE 6. ISL6410A EFFICIENCY vs LOAD CURRENT
100
IOUT = 200mA
90
IOUT = 600mA
80
70
60
50
4.4
4.6
4.8
5.0
5.2
5.4
5.6
VIN (V)
FIGURE 7. ISL6410A EFFICIENCY vs VIN
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