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ISL6410 Datasheet, PDF (6/13 Pages) Intersil Corporation – Single Synchronous Buck Regulators with Integrated FET
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ISL6410, ISL6410A
Electrical Specifications Recommended operating conditions unless otherwise noted. VIN = 3.3V ±10% (ISL6410) or 5V ±10%
(ISL6410A), TA = 25°C (Note 6). (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Efficiency
Efficiency
Soft-Start Time
IOUT = 200mA, VIN = 5.0V, VO = 3.3V (ISL6410A)
-
93
-
%
IOUT = 600mA, VIN = 5.0V, VO = 3.3V (ISL6410A)
-
91
-
%
4096 Clock Cycles @ 750kHz
-
5.5
-
ms
OSCILLATOR
Oscillator Frequency
620
750
860
kHz
Frequency Synchronization Range (fSYNC)
SYNC High Level Input Voltage
Clock signal on SYNC pin
As % of VIN
500
-
1000
kHz
70
-
-
%
SYNC Low Level Input Voltage
As % of VIN
-
-
30
%
Sync Input Leakage Current
SYNC = GND or VIN
Duty Cycle of External Clock Signal (Note 7)
-1
-
1
µA
20
-
60
%
PGOOD (ISL6410 interfaces to 3.3V Logic, ISL6410A interfaces to 5.0V Logic)
Rising Threshold
1mA minimum source/sink
+5.0
8.0
+10.5
%
Falling Threshold
-10.5
-8.0
-5.0
%
Rising/Falling Hysteresis
-
1
-
%
ENABLE
EN High Level Input Voltage
As % of VIN
70
-
-
%
EN Low Level Input Voltage
As % of VIN
-
-
30
%
EN Input Leakage Current
OVERVOLTAGE
EN = GND or VIN
-1
1
µA
Overvoltage Threshold
27
30
33
%
RESET BLOCK SPECIFICATIONS
RESET (reset released)
RESET (reset asserted)
ISL6410, ISOURCE = 500µA, VIN = 2.90V
ISL6410, ISINK = 1.2mA, VIN = 2.50V
0.8VIN
-
-
V
-
-
0.3
V
RESET Rising Threshold
ISL6410
2.74
2.78
2.81
V
RESET Falling Threshold
ISL6410
2.72
2.77
2.79
V
RESET (reset released)
RESET (reset asserted)
ISL6410A, ISOURCE = 800µA, VIN = 4.70V
0.8VIN
-
-
V
ISL6410A, ISINK = 3.2mA, VIN = 4.10V
-
-
0.4
V
RESET Rising Threshold
ISL6410A
4.5
4.58
4.64
V
RESET Falling Threshold
ISL6410A
4.47
4.55
4.61
V
RESET Threshold Hysteresis
ISL6410
-
20
-
mV
RESET Threshold Hysteresis
ISL6410A
-
30
-
mV
RESET Active Timeout Period (Note 8)
CT = 0.01mF
-
25
-
ms
VSET
VSET High Level Input
VIN-0.4V
-
-
V
VSET Low Level Input
-
-
0.4
V
VSET Open Level Input
-
VIN / 2
-
V
NOTES:
6. Specifications at -40°C and +85°C are guaranteed by design, not production tested.
7. Guaranteed by design, not production tested.
8. The RESET Timeout period is linear with CT at a slope of 2.5ms/nF, thus a 10nF capacitor provides for 25ms.
6
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