ISL6208C_14 Datasheet, PDF (9/11 Pages) Intersil Corporation – High Voltage Synchronous Rectified Buck MOSFET Drivers

ISL6208C
Diode Emulation
Diode emulation allows for higher converter efficiency under light
load situations. With diode emulation active, the ISL6208C will
detect the zero current crossing of the output inductor and turn
off LGATE. This ensures that discontinuous conduction mode
(DCM) is achieved. Diode emulation is asynchronous to the PWM
signal. Therefore, the ISL6208C will respond to the FCCM input
immediately after it changes state. Refer to“Typical Performance
Waveforms” on page 8. Note: Intersil does not recommend Diode
Emulation use with r_DS(ON) current sensing topologies. The turn-
OFF of the low-side MOSFET can cause gross current
measurement inaccuracies.
Three-State PWM Input
A unique feature of the ISL6208C and other Intersil drivers is the
addition of a shutdown window to the PWM input. If the PWM signal
enters and remains within the shutdown window for a set holdoff
time, the output drivers are disabled and both MOSFET gates are
pulled and held low. The shutdown state is removed when the PWM
signal moves outside the shutdown window. Otherwise, the PWM
rising and falling thresholds outlined in the “Electrical
Specifications” table on page 5 determine when the lower and
upper gates are enabled.
Adaptive Shoot-Through
Protection
Both drivers incorporate adaptive shoot-through protection to
prevent upper and lower MOSFETs from conducting
simultaneously and shorting the input supply. This is
accomplished by ensuring the falling gate has turned off one
MOSFET before the other is allowed to turn on.
During turn-off of the lower MOSFET, the LGATE voltage is monitored
until it reaches a 1V threshold, at which time the UGATE is released
to rise. Adaptive shoot-through circuitry monitors the upper MOSFET
gate-to-source voltage during UGATE turn-off. Once the upper
MOSFET gate-to-source voltage has dropped below a threshold of
1V, the LGATE is allowed to rise.
Internal Bootstrap Diode
This driver features an internal bootstrap Schottky diode. Simply
adding an external capacitor across the BOOT and PHASE pins
completes the bootstrap circuit.
The bootstrap capacitor must have a maximum voltage rating
above the maximum battery voltage plus 5V. The bootstrap
capacitor can be chosen from Equation 1:
C_BOO
T
≥
---^Q----^G-----^A----^T----^E---
ΔV_BOOT
(EQ. 1)
where Q_GATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The ΔV_BOOT term is
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate charge,
Q_GATE, of 25nC at 5V and also assume the droop in the drive
voltage over a PWM cycle is 200mV. One will find that a
bootstrap capacitance of at least 0.125µF is required. The next
larger standard value capacitance is 0.15µF. A good quality
ceramic capacitor is recommended.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Q_GATE = 100nC
0.4
0.2 _20nC
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ΔV_{BOOT_CAP} (V)
FIGURE 8. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE VOLTAGE
Power Dissipation
Package power dissipation is mainly a function of the switching
frequency and total gate charge of the selected MOSFETs.
Calculating the power dissipation in the driver for a desired
application is critical to ensuring safe operation. Exceeding the
maximum allowable power dissipation level will push the IC
beyond the maximum recommended operating junction
temperature of +125°C. The maximum allowable IC power
dissipation is approximately 800mW. When designing the driver
into an application, it is recommended that the following
calculation be performed to ensure safe operation at the desired
frequency for the selected MOSFETs. The power dissipated by the
driver is approximated, as shown in Equation 2:
P = f_sw(1.5V_UQ_U + V_LQ_L) + I_VCCV_CC
(EQ. 2)
where f_sw is the switching frequency of the PWM signal. V_U and
V_L represent the upper and lower gate rail voltage. Q_U and Q_L is
the upper and lower gate charge determined by MOSFET
selection and any external capacitance added to the gate pins.
The lV_CCV_CC product is the quiescent power of the driver and is
typically negligible.
1000
Q_U =100nC
900 Q_L = 200nC
800
Q_U = 50nC
Q_L = 100nC
Q_U = 50nC
Q_L = 50nC
700
600
Q_U = 20nC
500
Q_L =50nC
400
300
200
100
0
0 200 400 600 800 1000 1200 1400 1600 1800 2000
FREQUENCY (kHz)
FIGURE 9. POWER DISSIPATION vs FREQUENCY
9
FN8395.0
November 29, 2012