ISL54405_14 Datasheet, PDF (9/20 Pages) Intersil Corporation – CD/MP3 Quality Stereo 2:1 Multiplexer with Click and Pop Elimination

ISL54405
SPDT Switch Cell Architecture and
Performance Characteristics
The normally open (L₂, R₂) and normally closed (L₁, R₁) of the
SPDT switches are T-Type switches that have a typical r_ON of
1.9and an off-isolation of >120dB. The low on-resistance
(1.9and r_ON flatness (0.003) provide very low insertion loss
and minimal distortion to applications that require hi-fidelity
signal reproduction.
The SPDT switch cells have internal charge pumps that allow
for signals to swing below ground. They were specifically
designed to pass audio signals that are ground referenced and
have a swing of ± 2.828V_PEAK while driving either 10k/20k
(receiver) or 32 (headphone) loads.
Each switch cell incorporates special circuitry to gradually
decrease the switch resistance when transitioning from the
OFF-state (high impedance) to the ON-state (1.9). The
gradual decrease in the switch resistance provides for a slow
ramp of the voltage at the load side of the switch which helps
to eliminate clicks and pops in the speaker by suppressing the
transient during switching events. The output voltage ramp
time is determined by the capacitor value of the soft-start
capacitor connected at the CAP_SS pin. With a 0.1µF ceramic
chip capacitor the ramp time is approximately 4.6V/s. The
slow ramping of the signal at the output can be disabled by
floating the CAP_SS pin.
In addition to the slow ramp feature (soft-start feature) of the
in line switches, the part has special click and pop (C/P) shunt
circuitry at each of the signal pins (L, R, L₁, L₂, R₁, and R₂). A
pin’s C/P shunt circuitry is activated or deactivated depending
on the logic levels applied at the AC/DC and DIR_SEL control
pins. This shunt circuitry serves two functions:
1. In an AC coupled application they are activated and
directed to the source side of the switch to suppress or
eliminate click/pop noise in the speaker load when
powering up or down of the audio CODEC drivers.
2. For superior muting the C/P shunt circuitry is activated and
directed to the load side of the switch which gives >120dB
of OFF-Isolation when driving a 10k/20k receiver load
with an audio signal in the range of 20Hz to 22kHz.
If the AC/DC pin is driven LOW, all C/P shunt circuitry at all the
signal pins (L, R, L1, R1, L2, and R2) are deactivated and not
operable.
If the AC/DC pin is driven HIGH, then the logic at the DIR_SEL
pin will determine whether the L and R (COM) C/P shunt
circuitry is activated or the L1, L2, R1, and R2 (NOx, NCx) C/P
shunt circuitry is activated. When the DIR_SEL is driven LOW,
the L1, R1, L2, R2 C/P shunt circuitry will be activated while
the L and R C/P shunt circuitry will be deactivated. When the
DIR_SEL is driven HIGH, the L and R C/P shunt circuitry will be
activated while the L1, R1, L2, R2 C/P shunt circuitry will be
deactivated. Note: Shunt circuitry that is activated will be
turned ON when a switch cell is turned OFF and will be OFF
when a switch cell is turned ON.
MUTE TO ON
When the MUTE pin is driven LOW, the ISL54405 will transition
Supply Voltage, Signal Amplitude, and
Grounding
The power supply connected at VDD or the 5V_Supply pin
provides power to the ISL54405 part. The ISL54405 is a single
supply device that was designed to be operated with a 3.3V
±10% DC supply connected at the VDD pin or a 5V ±10% DC
supply connected at the 5V_Supply pin.
It was specifically designed to accept ground referenced
2V_RMS (± 2.828V_PEAK) audio signals at its signal pins while
driving either 10k/20k receiver loads or 32 headphone
loads.
When using the part in a 3.3V application the 5V_Supply pin
should be left floating. A 0.1µF decoupling capacitor should be
connected from the VDD pin to ground to minimize power
supply noise and transients. This capacitor should be located
as close to the pin as possible.
The part also has a 5V supply pin (5V_Supply) to allow it to be
used in 5V ±10% applications. Special circuitry within the
device converts the 5V, connected at the 5V_Supply pin, too
3.3V to properly power the internal circuitry of the device.
When using the part in a 5V application the VDD pin should be
left floating. A 0.1µF decoupling capacitor should be
connected from the 5V_Supply pin to ground to minimize
power supply noise. This capacitor should be located as close
to the pin as possible.
Grounding of the ISL54405 should follow a star configuration
(see Figure 8). All grounds of the IC should be directly
connected to the power supply ground return without
cascading to other grounds. This configuration isolates shunt
currents of the Click and Pop transients from the IC ground
and optimizes device performance.
+3.3V
MUTE
SEL
AC/DC
DIR_SEL
L
VDD
LOGIC
CONTROL
R
ISL54405
GND1
GND2
GND3
L1
L2
R1
R2
0.1µF
FIGURE 8. STAR GROUNDING CONFIGURATION
Mute Operation
When the MUTE logic pin is driven HIGH the part will go into the
mute state. In the mute state all switches of the SPDTs are
open while the T-Shunt switches are closed. In addition any
activated click and pop shunt circuitry at the signal pins is
turned on. See “Logic Control” on page 10 for more details.
to the ON-state in the following sequence:
Submit Document Feedback
9
FN6699.2
May 6, 2014