ISL5100A Datasheet, PDF (9/13 Pages) Intersil Corporation – Quad 18V Pin Electronics Driver/Window Comparator

ISL55100A
DUT interconnect. Lead lengths should be kept as short as
possible, maintaining as much decoupling on the drive rails
as possible and make sure scope measurements are made
properly. Often the inductance of a scope probe ground can
be the actual cause of the waveform distortion.
VH and VL (Driver Output Rails)
There are sets of VH and VL pins designated for each Driver.
These are unbuffered analog inputs that determine the Drive
High (VH) and Drive Low (VL) Voltages that the drivers will
deliver. These inputs are double bonded to reduce
inductance and decrease AC Impedance.
Each VH and VL should be decoupled with 4.7µF and 0.1µF
capacitors to ground. If all four VH/VLs are bussed per
device then one 4.7µF can be used for multiple VH/VL pins.
Layouts should also accommodate the placement of
capacitance “across” VH and VL. So in additional to
decoupling the VH/VL pins to ground, they are also
decoupled to each other.
Logic Inputs
The ISL55100 uses differential mode digital inputs, and can
therefore mate directly with LVDS or CML outputs. Single
ended logic families are handled by connecting one of the
digital input pins to an appropriate threshold voltage (e.g.,
1.4V for TTL compatibility).
LOSWING Circuit Option
The drivers include switchable circuitry that is optimized for
either low (VH-VL < 3V) or high output swings, and this
selection is accomplished via the LOSWING pin. Connecting
LOSWING to V_EE selects the circuits optimized for low
overshoots at low swings, while tying the pin V_CC enables
the large signal circuitry. (See Figure 6)
With LOSWING = V_EE, the low swing circuitry activates
whenever VH < V_EE + 5V, and the VH and VL currents
increase, so for the lowest power dissipation set LOSWING
= V_EE only if the output swing (VH-VL) is less than 3V, and
better than 10% overshoots are required.
For the best small signal performance, the VH/VL common
mode voltage [(VH + VL)/2] must be V_EE + 1.5V. So if V_EE =
0V, and the desired swing is 500mV, set VH = 1.75V, and VL
= 1.25V.
Driver and Receiver Overload Protection
The ISL55100 is designed to provide minimum and balanced
Driver ROUT. Great care should be taken when making use
of the ISL55100 low ROUT drivers as there is no internal
protection. There is no short circuit protection built into either
the driver or the receiver/comparator outputs. Also there are
no junction temperature monitors or thermal shutdown
features.
The driver or receiver outputs may be damaged by more
than a momentary short circuit directly to any low impedance
voltage. If included, a 50Ω Series Termination Resistor
9
provides suitable driver protection, but should be properly
rated.
External Logic Supply Option (V_EXT)
Connection of the V_EXT Pin to a 5.5V DC Source
(Referenced to V_EE) will reduce the V_CC-V_EE current drain.
Current drain is directly proportional to Data Rate. This
option will help with Power Supply/Dissipation should heat
distribution become an issue.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible, and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V_EE pin is
connected to ground, one 0.1µF ceramic capacitor should be
placed from the V_CC pin to ground. A 4.7µF tantalum
capacitor should then be connected from the V_CC pin to
ground. This same capacitor combination should be placed
at each supply pin to ground if split supplies are to be used.
Power Dissipation Considerations
Specifying continuous data rates, driver loads and driver
level amplitudes are key in determining power supply
requirements as well as dissipation/cooling necessities.
Driver Output patterns also impact these needs. The faster
the pin activity, the greater the need to supply current and
remove heat.
Figures 16 and 17 address power consumption relative to
Frequency of Operation. These graphs are based on Driving
6.0/0.0V Out into a 1kΩ Load. Theta ja for the device
package is 23.0, 16.6 and 14.9 Deg C/W based on Airflows
of 0, 1 and 2.5 meters per second. Device mounted per Note
1 under Thermal Information. With the high speed data rate
capability of the ISL55100, it is possible to exceed the 150°C
“absolute-maximum junction temperature” as operating
conditions and frequencies increase. Therefore, it is
important to calculate the maximum junction temperature for
the application to determine if operating conditions need to
be modified for the device to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
P_DMAX
=
T_{----J---M-----A----X------}-_----T_{----A----M----A----X--}
Θ_JA
where:
• T_JMAX = Maximum junction temperature
• T_AMAX = Maximum ambient temperature
• θ_JA = Thermal resistance of the package
• P_DMAX = Maximum power dissipation in the package
FN7486.0
October 31, 2005