ISL43231 Datasheet, PDF (9/15 Pages) Intersil Corporation – Low-Voltage, Single and Dual Supply, Triple SPDT Analog Switch

ISL43231
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
50%
t_ON
t_r < 20ns
t_f < 20ns
VNC_X
SWITCH
OUTPUT _0V
t_OFF
90% ^VOUT
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. ENABLE t_ON / t_OFF MEASUREMENT POINTS
C
V+
LOGIC
INPUT
V+
C
V-
C
EN, LE
NC_X
NO_X
EN
GND
COM_X
ADD_X
V_OUT
R_L
300Ω
C_L
35pF
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
------------^R-----^L-------------
R_L + R_(ON)
FIGURE 1B. ENABLE t_ON / t_OFF TEST CIRCUIT
3V
LOGIC
INPUT
0V
VNC_X
SWITCH
OUTPUT
0V
VNO_X
50%
t_TRANS
V_OUT
t_r < 20ns
t_f < 20ns
90%
10%
C
V+
V-
C
LOGIC
INPUT
V+
C
V-
C
NC_X ^{EN, LE}
NO_X
COM_X
ADD_{X GND EN}
V_OUT
R_L
300Ω
C_L
35pF
t_TRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
------------^R-----^L-------------
R_L + R_(ON)
FIGURE 1C. ADDRESS t_TRANS MEASUREMENT POINTS
FIGURE 1D. ADDRESS t_TRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
V-
C
LOGIC ^OFF
INPUT
ON
SWITCH
OUTPUT
V_OUT
Q = ∆V_OUT x C_L
3V
OFF
0V
∆V_OUT
R_G
EN, LE
COM_X
NO_X or NC_X
0Ω
ADD_X
V_G
GND
EN
LOGIC
INPUT
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V_OUT
C_L
1nF
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