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ISL31470E_10 Datasheet, PDF (9/21 Pages) Intersil Corporation – Fault Protected, Extended Common Mode Range, RS-485/RS-422 Transceivers
ISL31470E, ISL31472E, ISL31475E, ISL31478E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V,
TA = +25°C (Note 8). Boldface limits apply over the operating temperature range,
-40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP MIN
MAX
(°C) (Note 16) TYP (Note 16) UNITS
Receiver Skew | tPLH - tPHL |
Receiver Enable to Output Low
tSKD
tZL
(Figure 5)
RL = 1kΩ, CL = 15pF, SW = VCC
(Figure 6), (Note 12)
Full
-
Full
-
4
10
ns
-
50
ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND
Full
-
(Figure 6), (Note 12)
-
50
ns
Receiver Disable from Output
Low
tLZ RL = 1kΩ, CL = 15pF, SW = VCC
(Figure 6)
Full
-
-
50
ns
Receiver Disable from Output
tHZ RL = 1kΩ, CL = 15pF, SW = GND
Full
-
High
(Figure 6)
-
50
ns
Time to Shutdown
Receiver Enable from
Shutdown to Output High
tSHDN (Note 13)
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND
(Figure 6), (Notes 13, 15)
Full
60
160
600
ns
Full
-
-
2000
ns
Receiver Enable from
Shutdown to Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC
(Figure 6), (Notes 13, 15)
Full
-
-
2000
ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground
unless otherwise specified.
9. Supply current specification is valid for loaded drivers when DE = 0V.
10. Applies to peak current. See “Typical Performance Curves” beginning on page 14 for more information.
11. Keep RE = 0 to prevent the device from entering SHDN.
12. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
13. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered
shutdown. See “Low Power Shutdown Mode” on page 14.
14. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
15. Set the RE signal high time >600ns to ensure that the device enters SHDN.
16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
17. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15μs at a 1% duty cycle).
18. See “Caution” statement below the “Recommended Operating Conditions” section on page 5.
Test Circuits and Waveforms
VCC DE
DI
Z
D
Y
VOD
RL/2
RL/2 VOC
VCC DE
DI
Z
D
Y
RL/2
VOD
VOC
RL/2
375Ω
VCM
375Ω
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD AND VOC WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
9
FN7639.0
June 17, 2010