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ISL22424_15 Datasheet, PDF (9/20 Pages) Intersil Corporation – Low Noise, Low Power, SPI® Bus,256 Taps
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DCP Macro Model
RTOTAL
RH
RL
CL
CH
CW
10pF
10pF
25pF
RW
Timing Diagrams
Input Timing
CS
SCK
SDI
tLEAD
tSU
tH
tWL
MSB
SDO
HIGH IMPEDANCE
Output Timing
CS
SCK
tSO
SDO
SDI ADDR
MSB
tV
XDCP Timing (for All Load Instructions)
CS
SCK
SDI
MSB
VW
SDO
HIGH IMPEDANCE
9
ISL22424
tCYC
...
tWH
tFI
...
...
tHO
...
...
...
tCS
tRI
LSB
tLAG
tDIS
LSB
LSB
tWRT
FN6425.1
September 9, 2015
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