ISL22424_15 Datasheet, PDF (4/20 Pages) Intersil Corporation – Low Noise, Low Power, SPI® Bus,256 Taps

ISL22424
Pin Descriptions
TSSOP PIN
QFN PIN
SYMBOL
DESCRIPTION
1
11
RH0
“High” terminal of DCP0
2
12
RL0
“Low” terminal of DCP0
3
13
RW0
“Wiper” terminal of DCP0
4
14
RH1
“High” terminal of DCP1
5
15
RL1
“Low” terminal of DCP1
6
16
RW1
“Wiper” terminal of DCP1
7
1, 2, 3
NC
No connection
8
4
V-
Negative power supply pin
9
5
SDO
Data Output of the SPI serial interface
10
6
SCK
SPI interface clock input
11
7
GND
Device ground pin
12
8
SDI
Data Input of the SPI serial interface
13
9
CS
Chip Select active low input
14
10
VCC
Positive power supply pin
EPAD*
Exposed Die Pad internally connected to V-
* Note: PCB thermal land for QFN EPAD should be connected to V- plane or left floating. For more information refer to
http://www.intersil.com/data/tb/TB389.pdf
4
FN6425.1
September 9, 2015