CD4724BMS Datasheet, PDF (9/10 Pages) Intersil Corporation – CMOS 8-Bit Addressable Latch

CD4724BMS
MODE SELECTION
WD
R
ADDRESSED
LATCH
UNADDRESSED
LATCH
0
0 Follows Data
Holds Previous State
0
1 Follows Data (Active Reset to “0”
High 8-Channel
Demultiplexer)
1
0 Holds Previous State
A0
30%
70%
A1
A2
WD
70%
1
1 Reset to “0”
Reset to “0”
tW
WD = Write Disable
R = Reset
FIGURE 10. DEFINITION OF WRITE DISABLE ON TIME
DATA
A0
A1
A2
A3
A0
A1
A2
A3
DATA IN
1 _A0
Q0 ⁴ _{D0 1}
2 _A1
Q1 ⁵ _{D0 2}
3 _A2
Q2 ⁶ _{D0 3}
14 _WD
Q3 ⁷ _{D0 4}
13 _DATA
Q4 ⁹ _{D0 5}
CD4724BMS Q5 ¹⁰ _{D0 6}
Q6
11
D0 7
R
Q7 ¹² _{D0 8}
15
VDD
1
2
3
14
13
*
*1/6 CD4069
A0
A1
A2
WD
Q0 ⁴
Q1 ⁵
Q2 ⁶
Q3 ⁷
D0 9
D0 10
D0 11
D0 12
DATA
Q4 ⁹ D0 13
CD4724BMS Q5 ¹⁰ D0 14
Q6 ¹¹ D0 15
R
Q7 ¹² D0 16
15
VDD
FIGURE 11. 1 OF 16 DECODER/DEMULTIPLEXER
CD4724BMS
Q0
D
Q1
1/4 CD4016
0
1
Y
IN/OUT
2
3
WD _R
S0
S1
S2
CD4724BMS
S5
D
0
1
X
IN/OUT
2
WD
WD
R
Q15
3
WD
FIGURE 12. MULTIPLE SELECTION DECODING - 4 X 4 CROSSPOINT SWITCH
7-1275