CD4514BMS_06 Datasheet, PDF (9/9 Pages) Intersil Corporation – CMOS 4-Bit Latch/4-to-16 Line Decoders

CD4514BMS, CD4515BMS
Chip Dimensions and Pad Layouts
0 10 20 30 40 50 60 70 80 90 100 110 ¹¹²
74
70
60
50
40
71-79
(1.804-2.006)
30
20
10
0
4-10
(0.102-0.254)
109-117
(2.769-2.971)
Dimensions in parentheses are in milimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10^-3 inch.)
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
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