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CD40192BMS Datasheet, PDF (9/12 Pages) Intersil Corporation – CMOS Presettable Up/Down Counters (Dual Clock With Reset)
CD40192BMS, CD40193BMS
CL
S
Q
CL
=
Q
R
CL
CL
CL
R
CL S
p
p
S
n
n
CL
Q
R
CL
CL
p
CL
p
n
n
Q
CL
CL
CLOCK UP
1
1
X
X
1 = High Level
FIGURE 3. INTERNAL LOGIC OF FLIP-FLOP
TRUTH TABLE
CLOCK DOWN
1
1
X
X
PRESET ENABLE
1
1
1
1
0
X
0 = Low Level
RESET
0
0
0
0
0
1
ACTION
Count Up
No Count
Count Down
No Count
Preset
Reset
X = Don’t Care
Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC
30
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
10V
7.5
5.0
2.5
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 5. MIMIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
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