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X9250_06 Datasheet, PDF (8/20 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometers
Figure 8. Increment/Decrement Timing Limits
X9250
SCK
SI
tWRID
VW/RW
Voltage Out
INC/DEC CMD Issued
Table 1. Instruction Set
Instruction Set
Instruction
I3 I2 I1 I0 R1 R0 P1 P0
Operation
Read Wiper Counter
Register
1 0 0 1 0 0 P1 P0 Read the contents of the Wiper Counter
Register pointed to by P1- P0
Write Wiper Counter
Register
1 0 1 0 0 0 P1 P0 Write new value to the Wiper Counter Register
pointed to by P1- P0
Read Data Register
1 0 1 1 R1 R0 P1 P0 Read the contents of the Data Register
pointed to by P1- P0 and R1- R0
Write Data Register
1 1 0 0 R1 R0 P1 P0 Write new value to the Data Register pointed to
by P1- P0 and R1- R0
XFR Data Register to
Wiper Counter Register
1 1 0 1 R1 R0 P1 P0 Transfer the contents of the Data Register
pointed to by R1- R0 to the Wiper Counter
Register pointed to by P1- P0
XFR Wiper Counter
1 1 1 0 R1 R0 P1 P0 Transfer the contents of the Wiper Counter
Register to Data Register
Register pointed to by P1- P0 to the Register
pointed to by R1- R0
Global XFR Data Register 0 0 0 1 R1 R0 0
to Wiper Counter Register
0 Transfer the contents of the Data Registers
pointed to by R1- R0 of all four pots to their
respective Wiper Counter Register
Global XFR Wiper Counter 1 0 0 0 R1 R0 0
Register to Data Register
0 Transfer the contents of all Wiper Counter
Registers to their respective data Registers
pointed to by R1- R0 of all four pots
Increment/Decrement
Wiper Counter Register
0 0 1 0 0 0 P1 P0 Enable Increment/decrement of the Wiper
Counter Register pointed to by P1- P0
Read Status (WIP bit)
0 1 0 1 0 0 0 1 Read the status of the internal write cycle, by
checking the WIP bit.
8
FN8165.3
August 29, 2006