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ISL6292D Datasheet, PDF (8/13 Pages) Intersil Corporation – Li-ion/Li Polymer Battery Charger
ISL6292D
where ICHARGE is the charge current. The maximum power
dissipation occurs during the beginning of the CC mode. The
maximum power the IC is capable of dissipating is
dependent on the thermal impedance of the printed-circuit
board (PCB). Figure 2 shows, with dotted lines, two cases
that the charge currents are limited by the maximum power
dissipation capability due to the thermal foldback.
When using a current-limited adapter, the thermal situation
in the ISL6292D is totally different. Figure 3 shows the
typical charge curves when a current-limited adapter is
employed. The operation requires the IREF to be
programmed higher than the limited current ILIM of the
adapter, as shown in Figure 3. The key difference of the
charger operating under such conditions occurs during the
CC mode.
The Block Diagram, Figure 1, aids in understanding the
operation. The current loop consists of the current amplifier
CA and the sense MOSFET QSEN. The current reference IR
is programmed by the IREF pin. The current amplifier CA
regulates the gate of the sense MOSFET QSEN so that the
sensed current ISEN matches the reference current IR. The
main MOSFET QMAIN and the sense MOSFET QSEN form a
current mirror with a ratio of 100,000:1, that is, the output
charge current is 100,000 times IR. In the CC mode, the
current loop tries to increase the charge current by
enhancing the sense MOSFET QSEN, so that the sensed
current matches the reference current. On the other hand,
the adapter current is limited, the actual output current will
never meet what is required by the current reference. As a
result, the current error amplifier CA keeps enhancing the
QSEN as well as the main MOSFET QMAIN, until they are
fully turned on. Therefore, the main MOSFET becomes a
power switch instead of a linear regulation device. The
power dissipation in the CC mode becomes:
PCH = RDS(ON) ⋅ ICHARGE2
(EQ. 2)
where rDS(ON) is the resistance when the main MOSFET is
fully turned on. This power is typically much less than the
peak power in the traditional linear mode.
The worst power dissipation when using a current-limited
adapter typically occurs at the beginning of the CV mode, as
shown in Figure 3. The equation EQ.1 applies during the CV
mode. When using a very small PCB whose thermal
impedance is relatively large, it is possible that the internal
temperature can still reach the thermal foldback threshold. In
that case, the IC is thermally protected by lowering the
charge current, as shown with the dotted lines in the charge
current and power curves. Appropriate design of the adapter
can further reduce the peak power dissipation of the
ISL6292D. See the Application Information section for more
information.
Figure 4 illustrates the typical signal waveforms for the linear
charger from the power-up to a recharge cycle. More
detailed Applications Information is given below.
Applications Information
Power on Reset (POR)
The ISL6292D resets itself as the input voltage rises above
the POR rising threshold. The V2P8 pin outputs a 2.8V
voltage, the internal oscillator starts to oscillate, the internal
timer is reset, and the charger begins to charge the battery.
The two indication pins, STAT1 and STAT2, indicate LOW.
Figure 4 illustrates the start up of the charger between t0 to
t2.
The ISL6292D has a typical rising POR threshold of 3.4V
and a falling POR threshold of 2.4V. The 2.4V falling
threshold guarantees charger operation with a current-
limited adapter to minimize the thermal dissipation.
Charge Cycle
A charge cycle consists of three charge modes: trickle mode,
constant current (CC) mode, and constant voltage (CV)
mode. The charge cycle always starts with the trickle mode
until the battery voltage stays above VMIN (2.8V typical) for
15 consecutive cycles of the internal oscillator. If the battery
voltage drops below VMIN during the 15 cycles, the 15-cycle
counter is reset and the charger stays in the trickle mode.
The charger moves to the CC mode after verifying the
battery voltage. As the battery-pack terminal voltage rises to
the final charge voltage VCH, the CV mode begins. The
terminal voltage is regulated at the constant VCH in the CV
mode and the charge current is expected to decline. After
the charge current drops below IMIN, the ISL6292D indicates
the end-of-charge (EOC) with the STAT1 or STAT2 pin and
terminates. Signals in a charge cycle are illustrated in
Figure 4 between points t2 to t5.
VIN
V2P8
POR Threshold
Charge Cycle
Charge Cycle
STAT1
STAT2
15 Cycles to
1/8 TIMEOUT
VBAT
VRECHRG
2.8V VMIN
15 Cycles
ICHARGE
IMIN
t0 t1 t2 t3
t4
t5
t6 t7
t8
FIGURE 4. OPERATION WAVEFORMS
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