ISL6292D Datasheet, PDF (12/13 Pages) Intersil Corporation – Li-ion/Li Polymer Battery Charger

ISL6292D
TABLE 1. SUMMARY OF CHARGE STATUS AND LED OUTPUT
STATUS
LED OUTPUT
Charging
On
Charge Completed or Disabled OFF
Temperature Fault
TIMEOUT Fault
Blinks at the speed of T_9th
Blinks at the speed of T_8th
TABLE 2. SUMMARY OF CHARGE STATUS AND LED OUTPUT
STATUS
LED OUTPUT
Charging
On
Charge Completed or Disabled OFF
Fault
Blinks at the speed of T_8th
Shutdown
The ISL6292D can be shutdown by pulling the EN pin to
ground. When shut down, the charger draws typically less
than 30µA current from the input power and the 2.8V output
at the V2P8 pin is also turned off. The EN pin needs be
driven with an open-drain or open-collector logic output, so
that the EN pin is floating when the charger is enabled.
Input and Output Capacitor Selection
Typically any type of capacitors can be used for the input
and the output. A 0.47µF or higher value ceramic capacitor
for the input is recommended to be placed very close to the
input pin and the ground pin. Another 10µF capacitance is
required to stabilize the input voltage. When the battery is
attached to the charger, the output capacitor can be any
ceramic type with the value higher than 0.1µF. However, if
there is a chance the charger will be used as an LDO linear
regulator, a 10µF tantalum capacitor is recommended.
Working with Current-Limited Adapter
The ISL6292D can work with a current-limited adapter to
significantly reduce the thermal dissipation during charging.
Refer to the ISL6292 datasheet, which can be found at
http://www.intersil.com, for more details.
Board Layout Recommendations
The ISL6292D internal thermal foldback function limits the
charge current when the internal temperature reaches
approximately 100°C. In order to maximize the current
capability, it is very important that the exposed pad under the
package is properly soldered to the board and is connected
to other layers through thermal vias. More thermal vias and
more copper attached to the exposed pad will result in better
thermal performance. On the other hand, the number of vias
is limited by the size of the pad. The exposed pads for the
4x4 QFN package is able to have 5 vias. Refer to the
ISL6292 evaluation boards for layout examples.
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