ISL23415_15 Datasheet, PDF (8/20 Pages) Intersil Corporation – Single, Low Voltage Digitally Controlled Potentiometer

ISL23415
Serial Interface Specification For SCK, SDI, SDO, CS Unless Otherwise Noted. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 20) (Note 8) (Note 20) UNITS
t_CS
CS Deselect Time
2
µs
NOTES:
8. Typical values are for T_A = +25°C and 3.3V supply voltages.
9. LSB = [V(RW)₂₅₅ – V(RW)₀]/255. V(RW)₂₅₅ and V(RW)₀ are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the incremental
voltage when changing from one tap to an adjacent tap.
10. ZS error = V(RW)₀/LSB.
11. FS error = [V(RW)₂₅₅ – V_CC]/LSB.
12. DNL = [V(RW)_i – V(RW)_i-1]/LSB-1, for i = 1 to 255. i is the DCP register setting.
13. INL = [V(RW)_i – i • LSB – V(RW)₀]/LSB for i = 1 to 255
14._{T C V}
=
-^M-----^a----^x---^---^V---_V-^---^R-_--_R-^W----_W---^--ⁱ-_i^--_--–₊----_2M---₅---ⁱ-_°-ⁿ--_C-^---^V_---_-^---^R----^W-------^--ⁱ--^

------¹---⁰----⁶-------
+ 165 °C
for i = 16 to 255 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper voltage
and Min( ) is the minimum value of the wiper voltage over the temperature range.
15. MI = |RW₂₅₅ – RW₀|/255. MI is a minimum increment. RW₂₅₅ and RW₀ are the measured resistances for the DCP register set to FF hex and 00
hex respectively.
16. Roffset = RW₀/MI, when measuring between RW and RL.
Roffset = RW₂₅₅/MI, when measuring between RW and RH.
17. RDNL = (RW_i – RW_i-1)/MI -1, for i = 16 to 255.
18. RINL = [RW_i – (MI • i) – RW₀]/MI, for i = 16 to 255.
19. _{T C R}
=
_---M_-----a_----x_--R--_--R_-i----i+_--_{--2-–---5--}M_-°---C-i_--n_----_--R_-----i_--_---

------¹----⁰---⁶-------
+ 165 °C
for i = 16 to 255, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min( ) is the
minimum value of the resistance over the temperature range.
20. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
DCP Macro Model
Timing Diagrams
Input Timing
R_TOTAL
RH
RL
C_L
C_H
C_W
32pF
32pF
32pF
RW
CS
SCK
SDI
t_LEAD
t_SU
t_H
t_WL
MSB
t_CYC
...
t_WH
t_FI
...
t_CS
t_RI
LSB
t_LAG
SDO
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8
FN7780.2
September 14, 2015