HCTS373MS Datasheet, PDF (8/11 Pages) Intersil Corporation – Radiation Hardened Octal Transparent Latch, Three-State

AC Timing Diagrams
HCTS373MS
INPUT
LEVEL
LE
VS VS
VS
TW
DATA
Qn
VS
TPLH
TPLH
VS
VS
TPHL
TPHL
VS
FIGURE 1. DATA AND LATCH ENABLE PROPAGATION
DELAYS
INPUT
LEVEL
DATA
TH(L)
VS
TH(H)
VS
TSU(H)
VS
VS
TSU(L)
LE
VS
VS
FIGURE 2. LATCH ENABLE PREREQUISITE TIMES
VOH
VOL
TTLH
20%
80% 80%
OUTPUT
TTHL
20%
FIGURE 3. DATA SET-UP AND HOLD TIMES
AC Load Circuit
DUT
CL
AC VOLTAGE LEVELS
PARAMETER
HCTS
VCC
4.50
VIH
3.00
VS
1.30
VIL
0
GND
0
UNITS
V
V
V
V
V
TEST
POINT
RL
CL = 50pF
RL = 500Ω
Spec Number 518636
645