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HCS374MS_04 Datasheet, PDF (8/10 Pages) Intersil Corporation – Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered
AC Timing Diagrams
HCS374MS
INPUT
LEVEL
CP
tr
10%
90%
VS VS
TW
TPLH
tf
10%
VS
Qn
VS
TPHL
VS
INPUT
LEVEL
D
VS
VS
TH(L)
TSU(L)
CP
VS
VS
VS
TH(H)
TSU(H)
FIGURE 1. CLOCK TO OUTPUT DELAYS AND CLOCK PULSE
WIDTH
FIGURE 2. DATA SET-UP AND HOLD TIMES
VOH
VOL
TTLH
20%
80% 80%
OUTPUT
TTHL
20%
FIGURE 3. OUTPUT TRANSITION TIME
AC Load Circuit
DUT
CL
AC VOLTAGE LEVELS
PARAMETER
HCS
VCC
4.50
VIH
4.50
VS
2.25
VIL
0
GND
0
UNITS
V
V
V
V
V
TEST
POINT
RL
CL = 50pF
RL = 500Ω
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 518770
8