HCS109MS Datasheet, PDF (8/9 Pages) Intersil Corporation – Radiation Hardened Dual JK Flip Flop

HCS109MS
AC Timing Diagrams
VIH
VIL
VOH
VOL
VOH
VOL
VS
INPUT
TPLH
VS
TPHL
OUTPUT
TTLH
20%
80% 80%
OUTPUT
AC Load Circuit
DUT
CL
TTHL
20%
CL = 50pF
RL = 500Ω
AC VOLTAGE LEVELS
PARAMETER
HCS
VCC
4.50
VIH
4.50
VS
2.25
VIL
0
GND
0
UNITS
V
V
V
V
V
Pulse Width, Setup, Hold Timing Diagram
Positive Edge Trigger
INPUT
VIH
VIL
CP INPUT
VIH
VIL
TW
TSU
VS
TH
TW
Load Circuit
DUT
CL
CL = 50pF
RL = 500Ω
TH = Hold Time
TSU = Setup Time
TW = Pulse Width
PULSE WIDTH, SETUP, HOLD VOLTAGE LEVELS
PARAMETER
VCC
VIH
VS
VIL
GND
HCS
4.50
4.50
2.25
0
0
UNITS
V
V
V
V
V
110
TEST
POINT
RL
TEST
POINT
RL
Spec Number 518748