CD4073BMS Datasheet, PDF (8/10 Pages) Intersil Corporation – CMOS AND Gate

*
3 (11)
*
2 (12)
CD4073BMS, CD4081BMS, CD4082BMS
p
VDD
p
n
p
p
n
n
n
p
p
p
n
n
*
4 (10)
p
n
p
n
VSS
VDD
p
VDD
VSS
*
p
5 (9)
n
n
n
*
VSS
VSS
ALL INPUTS PROTECTED BY
CMOS PROTECTION NETWORK
FIGURE 5. SCHEMATIC DIAGRAM FOR CD4082BMS (1 OF 2 IDENTICAL GATES)
D
2 (12)
C
3 (11)
B
4 (10)
A
5 (9)
J
1 (13)
FIGURE 6. LOGIC DIAGRAM FOR CD4082BMS (1 OF 2 IDENTICAL GATES)
Typical Performance Characteristics
20 _{AMBIENT TEMPERATURE (TA) = +25oC}
SUPPLY VOLTAGE (VDD) = 15V
15
10V
10
5V
5
200
AMBIENT TEMPERATURE (T_A) = +25^oC
175
150
SUPPLY VOLTAGE (VDD) = 15V
125
100
10V
75
50
5V
25
0
5
10
15
20
INPUT VOLTAGE (VIN) (V)
FIGURE 7. TYPICAL VOLTAGE TRANSFER
CHARACTERISTICS
25
0 10 20 30 40 50 60 70 80 90 100
LOAD CAPACITANCE (CL) (pF)
FIGURE 8. TYPICAL PROPAGATION DELAY TIME AS A
FUNCTION OF LOAD CAPACITANCE
7-440