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CD40109BMS Datasheet, PDF (8/9 Pages) Intersil Corporation – CMOS Quad Low-to-High Voltage Level Shifter
CD40109BMS
Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (TA) = +25oC
175
150
VCC = 5V, VDD = 10V
125
VCC = 5V, VDD = 15V
100
75
VCC = 10V, VDD = 15V
50
25
0
0 10 20 30 40 50 60 70 80 90 100
LOAD CAPACITANCE (CL) (pF)
FIGURE 8. TYPICAL LOW-TO-HIGH PROPAGATION DELAY
TIME AS A FUNCTION OF LOAD CAPACITANCE
AMBIENT TEMPERATURE (TA) = +25oC
25
20
15
RECOMMENDED
OPERATING
10
BOUNDARY
5
0
0
5
10
15 20 25
SUPPLY VOLTAGE (VCC) (V)
FIGURE 10. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL
SUPPLY VOLTAGE
AMBIENT TEMPERATURE (TA) = +25oC
10 VIN
VSS
8
VOUT
6 VSS
VCC
*VSWITCH
VDD
50%
ENABLE = VCC
VCC = 15V
4
VCC = 10V
2
VCC = 5V
* VSWITCH = INPUT VOLTAGE AT
WHICH OUTPUT LEVEL IS 50%
OF VDD - VSS
0
2.5
5
7.5 10 12.5 15 17.5 20
SUPPLY VOLTAGE (VDD) (V)
FIGURE 9. TYPICAL INPUT SWITCHING AS A FUNCTION OF
HIGH LEVEL SUPPLY VOLTAGE
105 8
6
AMBIENT TEMPERATURE (TA) = +25oC
4
2
104 8
6
4
2
103 8
6
4
2
102
8
6
4
2
VCC = 5V, VDD = 15V
VCC = 5V, VDD = 10V
VCC = 10V, VDD = 15V
VCC = 5V, VDD = 10V
LOAD CAPACITANCE CL = 50pF
CL = 15pF
10
2 4 68 2 4 68 2 4 68 2 4 68 2 4 68
1
10
102
103
104
105
INPUT FREQUENCY (fi) (kHz)
FIGURE 11. TYPICAL DYNAMIC POWER DISSIPATION AS A
FUNCTION OF INPUT FREQUENCY
Test Circuit and Waveform
A
INPUT
(SEE
TABLE)
VCC
1
2
3
4
5
6
7
8
VSS
VDD
16
15
14
13
12
11
10
9
PULSE
GENERATOR
1K B
RS (SEE
CL TABLE)
50pF
OUTPUT
CHAR
tPHZ
tPLZ
tPZL
tPZH
TEST VOLTAGE
AT A AT B
VCC VSS
VSS VDD
VSS VDD
VCC VSS
ENABLE 50%
INPUT
tPLZ
OUTPUT
OUTPUT
tPHZ
10%
90%
VCC
50%
VSS
tPZL
90%
VDD
VOL
VOH
10%
VSS
tPZH
FIGURE 12. OUTPUT ENABLE DELAY TIMES TEST CIRCUIT AND WAVEFORMS
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