ISL70001SEH Datasheet, PDF (7/17 Pages) Intersil Corporation – Rad Hard and SEE Hard 6A Synchronous Buck Regulator

ISL70001SEH
Electrical Specifications Unless otherwise noted, VIN = AVDD = DVDD = PVINx = EN = M/S = 3V or 5.5V;
GND = AGND = DGND = PGNDx = TDI = TDO = ZAP = 0V; FB = 0.65V; PORSEL = VIN for 4.5V ≤ VIN ≤ 5.5V and GND for V_IN < 4.5V,
SYNC = LXx = Open Circuit; PGOOD is pulled up to V_IN with a 1k resistor; REF is bypassed to GND with a 220nF capacitor; SS is bypassed to GND with a
100nF capacitor; I_OUT = 0A; T_A = T_J = +25°C. (Note 3). Boldface limits apply over the operating temperature range, -55°C to +125°C; over a total iodizing
dose of 100krad(Si) with exposure at a high dose rate of 50 - 300krad(Si)/s; and over a total iodizing dose of 50krad(Si) with exposure at a low dose rate
of <10mrad(Si)/s.
PARAMETER
TEST CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4)
UNITS
POWER SUPPLY
Operating Supply Current
Shutdown Supply Current
OUTPUT VOLTAGE
V_IN = 5.5V
V_IN = 3.6V
V_IN = 5.5V, EN = GND
V_IN = 3.6V, EN = GND
40
65
mA
25
45
mA
6
12
mA
3
6
mA
Reference Voltage Tolerance
0.594
0.6
0.606
V
Output Voltage Tolerance
Feedback (FB) Input Leakage Current
PWM CONTROL LOGIC
V_OUT = 0.8V to 2.5V for V_IN = 4.5V to 5.5V,
V_OUT = 0.8V to 2.5V for V_IN = 3V to 3.6V,
I_OUT = 0A to 6A (Notes 5, 6)
V_IN = 5.5V, V_FB = 0.6V
-2
0
2
%
-1
0
1
µA
Oscillator Accuracy
0.85
1
1.15
MHz
External Oscillator Range
.8
1
1.2
MHz
Minimum LXx On Time
Minimum LXx Off Time
Minimum LXx On Time
Minimum LXx Off Time
Master/Slave (M/S) Input Voltage
V_IN = 5.5V, Test Mode
V_IN = 5.5V, Test Mode
V_IN = 3V, Test Mode
V_IN = 3V, Test Mode
Input High Threshold
Input Low Threshold
110
150
ns
40
100
ns
150
210
ns
50
100
ns
V_IN - 0.5 1.3
V
1.2
0.5
V
Master/Slave (M/S) Input Leakage Current V_IN = 5.5V, M/S = GND or V_IN
Synchronization (SYNC) Input Voltage
Input High Threshold, M/S = GND
-1
0
1
µA
2.3
1.7
V
Input Low Threshold, M/S = GND
1.5
1
V
Synchronization (SYNC) Input Leakage
Current
V_IN = 5.5V, M/S = GND, SYNC = GND or V_IN
-1
0
1
µA
Synchronization (SYNC) Output Voltage
POWER BLOCKS
V_IN - V_OH @ I_OH = -1mA
V_OL@ I_OL = 1mA
0.15
0.4
V
0.15
0.4
V
Upper Device r_DS(ON)
Lower Device r_DS(ON)
LXx Output Leakage
Deadtime
V_IN = 3V, 0.4A Per Power Block, Test Mode (Note 6) 122
215
346
mΩ
V_IN = 3V, 0.4A Per Power Block, Test Mode (Note 6)
77
146
236
mΩ
V_IN = 5.5V, EN = LXx = GND, Single LXx Output
-1
0
µA
V_IN = 5.5V, EN = GND, LXx = V_IN, Single LXx Output
0
15
µA
Within a Single Power Block or between Power
1.7
5
ns
Blocks (Note 6)
Efficiency
V_IN = 3.3V, V_OUT = 1.8V, I_OUT = 3A
V_IN = 5V, V_OUT = 2.5V, I_OUT = 3A
90
%
92
%
7
FN7956.0
November 30, 2011