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ISL54053_14 Datasheet, PDF (7/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch
ISL54053
Test Circuits and Waveforms (Continued)
V+
C
SIGNAL
GENERATOR
NO OR NC
IN 0V OR V+
rON = V1/100mA
NO OR NC
VNX
100mA
V1
V+
C
IN VINL OR VINH
ANALYZER
RL
COM
GND
COM
GND
FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+
C
50Ω
NO OR NC
COM
FIGURE 5. rON TEST CIRCUIT
V+
C
NO or NC
IN1
0V OR V+
ANALYZER
RL
NC OR NO
GND
SIGNAL
GENERATOR
IMPEDANCE
ANALYZER
IN VINL OR VINH
COM
GND
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL54053 is a bidirectional, single pole/double throw
(SPDT) analog switch which offers precise switching
capability from a single 1.8V to 5.5V supply with low
ON-resistance (0.8Ω) and high speed operation
(tON = 24ns, tOFF = 10ns). The device is especially well
suited for portable battery powered equipment due to its
low operating supply voltage (1.8V), low power
consumption (5.5µW), low leakage currents (300nA
max) and the small µTDFN and SOT-23 packages. The
low on-resistance and rON flatness provide very low
insertion loss and distortion to application that require
signal reproduction.
Supply Sequencing and Overvoltage
Protection
With any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents which might permanently damage the IC. All
I/O pins contain ESD protection diodes from the pin to
V+ and to GND (see Figure 8). To prevent forward
biasing these diodes, V+ must be applied before any
input signals, and the input signal voltages must remain
between V+ and GND.
If these conditions cannot be guaranteed, then
precautions must be implemented to prohibit the current
and voltage at the logic pin and signal pins from
exceeding the maximum ratings of the switch. The
following two methods can be used to provided additional
protection to limit the current in the event that the
voltage at a signal pin or logic pin goes below ground or
above the V+ rail.
Logic inputs can be protected by adding a 1kΩ resistor in
series with the logic input (see Figure 8). The resistor
limits the input current below the threshold that
produces permanent damage, and the sub-microamp
input current produces an insignificant voltage drop
during normal operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch. Connecting schottky
diodes to the signal pins (as shown in Figure 8) will shunt
the fault current to the supply or to ground thereby
protecting the switch. These schottky diodes must be
sized to handle the expected fault current.
7
FN6460.3
October 19, 2009