ISL54053_14 Datasheet, PDF (6/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch

ISL54053
Test Circuits and Waveforms
V_INH
LOGIC
INPUT
V_INL
SWITCH
INPUT
V_Nx
SWITCH
OUTPUT _0V
50%
t_OFF
V_OUT
90%
t_ON
t_r < 20ns
t_f < 20ns
90%
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO OR NC
IN
GND
COM
V_OUT
R_L
C_L
50Ω 35pF
Logic input waveform is inverted for switches that have the
opposite logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
-----------^R-----^L------------
R_L + r_(ON)
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
V_OUT
LOGIC ^ON
INPUT
ΔV_OUT
OFF
Q = ΔV_OUT x C_L
V_INH
ON
V_INL
R_G
NO OR NC
COM
V_G
GND
IN
LOGIC
INPUT
V_OUT
C_L
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
C
LOGIC
INPUT
V_INH
V_INL
NO
V_NX
NC
IN
COM
V_OUT
R_L
C_L
50Ω
35pF
SWITCH
OUTPUT
V_{OUT 0V}
90%
LOGIC
INPUT
GND
t_D
C_L includes fixture and stray capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
6
FN6460.3
October 19, 2009