ISL45042_14 Datasheet, PDF (7/9 Pages) Intersil Corporation – LCD Module Calibrator

ISL45042
Power Supply Sequence
The recommended power supply sequencing is shown in
Figure 6. When applying power, VDD should be applied
before or at the same time as AVDD. The minimum time for
t_VS is 0µs. When removing power, the sequence of VDD and
AVDD is not important. Do not remove VDD or AVDD within
100ms of the start of the EEPROM programming cycle.
Removing power before the EEPROM programming cycle is
completed may result in corrupted data in the EEPROM.
V_DD
A_VDD
t_VS
FIGURE 6. POWER SUPPLY SEQUENCE
Verifying the Programmed Value
The following sequence can be used to verify the
programmed value without having to sequence the V_DD
supply. To verify the programmed value, follow the following
steps. The ISL45042 will read memory contents and be set
to that value when the CE pin is grounded.
1. Power-up the ISL45042.
2. CE pin = V_DD.
3. Change counter value with CTL pin to desired value.
4. CTL = more than 4.9V and 200ms. Counter value
programmed.
5. Change the counter value with CTL pin to a different
value.
6. CE pin = Ground.
7. Check that the output value is the one programmed in
Step 4.
Generating VDD and CE supply from a Larger
Voltage Source
The CE pin has an internal pull-down resistor (see
R_INTERNAL in Figure 7). The impedance of this resistor is
400kΩ to 5MΩ. If your design is using a resistor divider
network to generate the 3.3V supply (for both V_DD and CE to
enable programming) from a larger voltage source, the
400kΩ (worst case) resistor needs to be taken into account
as a parallel resistance when the CE pin is connected to this
source. Another design concern is to be able to provide
enough supply current during programming. The ISL45042
draws about 2mA during this process. Recommended
resistor values are shown in Figure 7. This design will result
in an additional 0.83mA quiescent current flowing through
resistors R_A and R_B.
V_CC = 5V
R_A
2kΩ
CE
VCE
R_B
4kΩ
ISL45042
SCHMITT
TRIGGER
CE LOGIC
R_INTERNAL = 400kΩ to 5MΩ
FIGURE 7. APPLICATION GENERATING VDD AND VCE
VOLTAGES
7
FN6072.9
April 13, 2011