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ISL4089_06 Datasheet, PDF (7/9 Pages) Intersil Corporation – DC-Restored Video Amplifier
ISL4089
RG
475Ω
RF
475Ω
VIDEO
INPUT
RX1
75Ω
VIN-
CX1
VIN+
1.2V
+V1
ISL4089
-
A1
+
S1
4k
VOUT
V+
VREF
VRef
0V to +4.5V
A2
+-
10mV
+V2
HOLD
TTL
INPUT
40pF
GND
0.1µF
RXT
75Ω
VIDEO
OUT
4.7µF
+5V
GND
FIGURE 13. BASIC +5V APPLICATION CIRCUIT
Using the Reference Voltage Input (VREF)
Implementing DC-restore and amplifying composite video
using a single +5V supply amplifier, requires attention to the
performance of the amplifier over the minimum to maximum
range of output voltage swing. The differential gain - phase
plot in Figure 6 shows the amplifier accuracy operating from
a single +5V supply, driving a 300mVP-P and a 600mVP-P
signal into a 150Ω load. Over the output DC voltage range of
0.5V to 3.25V, differential gain and phase are less than
0.05% and 0.05° respectively and defines the optimum
output voltage range of the ISL4089. Figure 6 also shows
that as the signal level increases, a corresponding decrease
in the output DC level (min/max voltage swing) can be
expected. The VREF input enables the output DC voltage
level to be optimally programmed within the min/max voltage
range, according to Equation 2. The values in Figure 6 take
into account the additional amplifier overhead (300mVP-P
and 600mVP-P) needed by the video signal. Although the
AC performance degrades below ~0.5V, the ISL4089
maintains DC accuracy down to 10mV.
Limiting the Output Current
No output short circuit current limit exists on these parts. All
applications need to limit the output current to less than
60mA. Adequate thermal heat sinking of the parts is also
required.
Application Information
A typical single supply application circuit using the EL1883
sync separator to generate the DC-restore hold command, is
shown in Figure 13. The ISL4089 is configured for a gain of
2, and 75Ω input and output terminations are used for cable
driving; providing an end to end gain of 1. DC-restore is
performed during sync tip using the composite sync output
of the EL1883, which clamps the -300mV input sync tip level
to 0VDC at the ISL4089 output (Figure 15 - lower trace).
Clamping sync tip to 0VDC forces the black level, color burst
and active video to the +300mV level at the 75Ω load in the
terminal equipment, and to +600mV at the ISL4089 output
pin. The +600mV DC offset is safely within the lower linear
range of the ISL4089 output (Figure 6 - Differential Gain -
Phase) and the 2V maximum video amplitude at the output
is safely within the upper limit. In applications where the sync
tip level can’t be guaranteed, positioning the active video
within the linear range can be accomplished using the back
porch clamp output of the EL1883 and supplying +1V to the
VREF input. This has the effect of clamping the back porch to
the +1V VREF level at the output while enabling the negative
sync tip level to pass through to the output.
7
FN6192.1
June 28, 2006