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ISL29002 Datasheet, PDF (7/10 Pages) Intersil Corporation – Light-to-Digital I2C Sensor
ISL29002
Data Registers
The ISL29002 contains four 8-bit data registers. These
registers cannot be specifically addressed, as is conventional
with other I2C peripherals; instead, performing a read operation
on the device always returns all available registers in ascending
order. See Table 2 for a description of each register.
The first two 8-bit data registers contain the most recent
sensor reading. The meaning of the specific value stored in
these data registers depends on the command written via
the I2C interface; see Table 1 for information on the various
commands. The first byte read over the I2C interface is the
least-significant byte; the second is the most significant. This
byte ordering is often called “little-endian” ordering.
The third and fourth 8-bit data registers contain the
integration counter value corresponding to the most recent
sensor reading. The ISL29002 includes a free-running
oscillator, each cycle of which increments a 16-bit counter. At
the end of each integration period, the value of this counter
is made available in these two 8-bit registers. Like the
sensor reading, the integration counter value is read across
the I2C bus in little-endian order.
TABLE 2. DATA REGISTERS
ADDRESS
CONTENTS
00(hex) Least-significant byte of most recent sensor reading.
01(hex) Most-significant byte of most recent sensor reading.
02(hex) Least-significant byte of integration counter value
corresponding to most recent sensor reading.
03(hex) Most-significant byte of integration counter value
corresponding to most recent sensor reading.
Note that the integration counter value is only available
when using one of the three externally-timed operating
modes; when using internally-timed modes, the device will
NAK after the two-byte sensor reading has been read.
Internal Timing Mode
When using one of the three internal timing modes, each
integration period of the ISL29002 is timed by 215 = 32,768
clock cycles of an internal oscillator. The nominal frequency
of the internal oscillator is 300kHz, which provides 110ms
internally-timed integration periods. The oscillator frequency
is dependent upon an external resistor, REXT, and can be
adjusted by selecting a different resistor value. The
resolution and maximum range of the device are also
affected by changes in REXT; see below.
The oscillator frequency, fosc can be calculated with the
following equation:
fosc
=
300 k
H
z
⋅
-1---0---0----k----Ω--
REXT
(EQ. 1)
REXT is an external resistor required nominally 100kΩ, and
provides 110ms internal timing and a 1-50,000lux range for
Diode 1. Doubling this resistor value to 200kΩ halves the
internal oscillator frequency, providing 220ms internal timing.
In addition, the maximum lux range of Diode 1 is also
halved, from 50,000lux to 25,000lux, and the resolution is
doubled, from 0.65 counts per lux to 1.3 counts per lux.
The acceptable range of this resistor is 50kΩ (providing 55ms
internal timing, 100,000lux maximum reading, ~0.33 counts
per lux) to 500kΩ (550ms internal timing, 10,000lux maximum
reading, ~3.3 counts per lux). See Table 3 for REXT selection.
When using one of the three internal timing modes, the
ISL29002’s resolution is determined by the ratio of the max lux
range to 32,768, the number of clock cycles per integration.
The following equations describe the light intensity, E in lux,
as a function of the sensor reading, and the integration time
as a function of the external resistor.
E(Lux)
=
--------1---------
32,768
⋅
(---R---5--e-0--x--,-t--0-⁄--01---0-0---0l--u--k--x-Ω------)
⋅
Data1
(EQ. 2)
Tint = 110ms ⋅ 1----R0---0-e---kx---Ω-t--
where,
E is the measured light intensity in lux
Data1 is the sensor reading
Tint is the integration time,
REXT is external resistor value.
(EQ. 3)
TABLE 3. REXT RESISTOR SELECTION GUIDE
REXT
(kΩ)
INTEGRATION LUX RANGE RESOLUTION,
TIME (ms)
(lux)
COUNTS/LUX
50 (Min)
55
100,000
0.33
90.9
100
55,000
0.61
100
110
50,000
0.67
Recommended
200
220
25,000
1.33
500 (Max)
550
10,000
3.33
External Timing Mode
When using one of the three external timing modes, each
integration period of the ISL29002 is determined by the time
which passes between consecutive external timing commands
received over the I2C bus. The user starts the integration by
sending an external command and stops the integration by
sending another external command. The integration time, Tint,
therefore is determined by the following equation:
Tint
=
-i-I--2---C---
fI2C
(EQ. 4)
where:
iI2C is the number of I2C clock cycles to obtain the Tint.
fI2C is the I2C operating frequency.
The internal oscillator, fOSC, operates identically in both the
internal and external timing modes, with the same
dependence on REXT. However, when using one of the three
external timing modes, the number of clock cycles per
7
FN7465.2
December 1, 2006