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ISL25700 Datasheet, PDF (7/18 Pages) Intersil Corporation – Programmable Temperature Controlled MOSFET Driver
ISL25700
Operating Specifications Over the recommended operating conditions unless otherwise specified. Boldface limits
apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 13) (Note 6) (Note 13) UNITS
tAA
SCL Falling Edge to SDA
(Note 11) Output Data Valid
tBUF Time the Bus Must be Free
(Note 11) Before the Start of a New
Transmission
SCL falling edge crossing 30% of VI2C,
until SDA exits the 30% to 70% of
VI2C window
SDA crossing 70% of VI2C during a
STOP condition, to SDA crossing 70%
of VI2C during the following START
condition
1300
900
ns
ns
tLOW
tHIGH
tSU:STA
Clock LOW Time
Clock HIGH Time
START Condition Setup Time
tHD:STA START Condition Hold Time
tSU:DAT Input Data Setup Time
tHD:DAT Input Data Hold Time
tSU:STO STOP Condition Setup Time
tDH
Output Data Hold Time
tR
SDA and SCL Rise Time
Measured at the 30% of VI2C crossing
Measured at the 70% of VI2C crossing
SCL rising edge to SDA falling edge.
Both crossing 70% of VI2C.
From SDA falling edge crossing 30%
of VI2C to SCL falling edge crossing
70% of VI2C
From SDA exiting the 30% to 70% of
VI2C window, to SCL rising edge
crossing 30% of VI2C
From SCL falling edge crossing 70% of
VI2C to SDA entering the 30% to 70%
of VI2C window
From SCL rising edge crossing 70% of
VI2C, to SDA rising edge crossing 30%
of VI2C
From SCL falling edge crossing 30% of
VI2C, until SDA enters the 30% to
70% of VI2C window
From 30% to 70% of VI2C
1300
600
600
600
100
0
600
0
20 +
0.1 * Cb
ns
ns
ns
ns
ns
ns
ns
ns
250
ns
tF
SDA and SCL Fall Time
From 70% to 30% of VI2C
20 +
0.1 * Cb
250
ns
Cb
Capacitive Loading of SDA or SCL Total on-chip and off-chip
10
400
pF
Rpu SDA and SCL Bus Pull-Up
Maximum is determined by tR and tF.
1
kΩ
(Note 11) Resistor Off-Chip
For Cb = 400pF, max is about 2~2.5kΩ.
For Cb = 40pF, max is about 15~20kΩ
tWC
(Notes
11, 12)
Non-Volatile Write Cycle Time
15
20
ms
NOTES:
6. Typical values are for TA = +25°C and 12V supply voltage.
7. LSB: [VDAC255 – VDAC0]/255. VDAC255 and VDAC0 are the DAC output voltage when DAC register set to FF hex and 00 hex
respectively.
8. DNL = [VDACi – VDACi-1]/LSB-1, for i = 1 to 255. i is the DAC register setting.
9. INL = [VDACi – (i • LSB + VDAC0)]/LSB for i = 1 to 255.
10.
TCV
= -V----D-----A----C-----i-(---T----)---–-----V----D-----A-----C----i--(--4----0---°---C-----) × ----------1---0----6----------
V D A Ci ( 40 °C )
(T – 40)°C
for i = 1 to 255 decimal, T = -40°C to +125°C, referenced to 40°C.
11. Limits established by characterization and are not production tested.
12. tWC is the time from a valid STOP condition at the end of a Write sequence of a I2C serial interface Write operation, to the
end of the self-timed internal non-volatile write cycle. The Busy Polling method can be used to determine the end of the
non-volatile write cycle.
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
14. B25/85 is a thermistor material specific constant; represents the slope of the Resistance vs. Temperature curve.
7
FN6885.0
September 3, 2010