ISL25700 Datasheet, PDF (6/18 Pages) Intersil Corporation – Programmable Temperature Controlled MOSFET Driver

ISL25700
Analog Specifications Over recommended operating conditions unless otherwise stated. Boldface limits apply over
the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 13) (Note 6) (Note 13) UNITS
V_{DAC_OFFSET} Offset
DAC register set to 0, No load
0
0.2
1
LSB
(Note 7)
R_OUT
DAC Output Impedance
350
Ω
PSRR
Power Supply Rejection Ratio DAC at middle scale, frequency
from 0Hz to 25kHz
-85
dB
TC_V
(Notes 10,
11)
Temperature Coefficient
DAC register set between 20 hex
and FF hex
±45
ppm/°C
Operating Specifications Over the recommended operating conditions unless otherwise specified. Boldface limits
apply over the operating temperature range, -40°C to +125°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 13) (Note 6) (Note 13) UNITS
I_DD1
V_DD Supply Current
(Non-Volatile Write/read)
I_DD2
V_DD Supply Current
(Volatile Write/read)
f_SCL
(for
= 400kHz;
I²C, Active,
SDA = Open;
Read and Write
States) I_PMOS = 0mA, DAC unload
I_PMOS = 0mA, DAC unload
4
mA
2.8
mA
I_LkgDig Leakage Current, at SDA and Voltage at pin from GND to VCC
-2
SCL Pins
2
μA
t_DAC DAC Settling Time
(Note 11)
From bus STOP condition to V_DAC
change
3
μs
V_POR Power-On Recall Voltage
Minimum V_DD at which memory recall
occurs
2.5
2.9
V
V_DD Ramp V_DD Ramp Rate
t_D
Power-Up Delay
(Note 11)
@ any level from 0V to 15V
0.2
V_DD above V_POR, to DAC Register recall
completed, and I²C Interface in
standby state
50
V/ms
1
ms
EEPROM SPECIFICATIONS
EEPROM Endurance
10,000
Cycles
EEPROM Retention
Temperature ≤ +55°C
50
Years
Temperature ≤ +125°C
10
Years
SERIAL INTERFACE SPECIFICATIONS
V_I2C
I²C Bus Voltage
V_I2C ≤ V_DD
2.7
5.5
V
V_IL
SDA, and SCL Input Buffer
V_I2C from 2.7V to 5.5V
LOW Voltage
0.8
V
V_IH
SDA, and SCL Input Buffer
V_I2C from 2.7V to 5.5V
1.4
V
HIGH Voltage
Hysteresis SDA and SCL Input Buffer
(Note 11) Hysteresis
0.05*V_I2C
V
V_OL SDA Output Buffer LOW
(Note 11) Voltage, Sinking 4mA
0
0.4
V
Cpin SDA, and SCL Pin Capacitance
(Note 11)
10
pF
f_SCL SCL Frequency
t_IN
Pulse Width Suppression Time Any pulse narrower than the max spec
(Note 11) at SDA and SCL Inputs
is suppressed
400
kHz
50
ns
6
FN6885.0
September 3, 2010