ICM7211AM_06 Datasheet, PDF (7/8 Pages) Intersil Corporation – 4-Digit, LCD Display Driver

ICM7211AM
TABLE 1. OUTPUT CODES (Continued)
BlNARY
B3
B2
B1
BO
CODE B
ICM7211AM
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
BLANK
The ICM7211AM is intended to accept data from a data bus
under processor control.
In these devices, the four data input bits and the two-bit digit
address (DA1 pin 31, DA2 pin 32) are written into input
buffer latches when both chip select inputs (CS1 pin 33, CS2
pin 34) are taken low. On the rising edge of either chip select
input, the content of the data input latches is decoded and
stored in the output latches of the digit selected by the
contents of the digit address latches.
An address of 00 writes into D4, DA2 = 0, DA1 = 1 writes into
D3, DA2 = 1, DA1 = 0 writes into D2, and 11 writes into D1.
The timing relationships for inputting data are shown in
Figure 1, and the chip select pulse widths and data setup and
hold times are specified under Operating Characteristics.
a
fb
g
ec
d
FIGURE 5. SEGMENT ASSIGNMENT
Test Circuit
V_DD
+-
V_SS
EACH SEGMENT
OUTPUT TO
BACKPLANE
WITH A 200pF
CAPACITOR
1 V_DD
40
2
ICM7211AM
39
3
38
4
37
5 BP
OSC 36
6
V_SS 35
7
34
8
DIGIT/CHIP
33
9
SELECT ₃₂
INPUTS
10
31
11
30
12
DATA ²⁹
13
INPUTS
28
14
27
15
26
16
25
17
24
18
23
19
22
20
21
V_DD
MICROPROCESSOR
VERSION
V_SS MULTIPLEXED
VERSION
V_DD
FIGURE 6.
7
FN3158.7
April 17, 2006