HUF76113T3ST Datasheet, PDF (7/12 Pages) Fairchild Semiconductor – 4.7A, 30V, 0.031 Ohm, N-Channel, Logic Level UltraFET Power MOSFET

HUF76113T3ST
Test Circuits and Waveforms (Continued)
V_GS
I_g(REF)
V_DS
R_L
DUT
+
V_DD
-
FIGURE 19. GATE CHARGE TEST CIRCUIT
V_DD
V_DS
Q_g(TOT)
V_GS
V_GS = 1V
0
I_g(REF)
0
Q_g(5)
Q_g(TH)
V_GS = 5V
V_GS = 10
FIGURE 20. GATE CHARGE WAVEFORMS
V_DS
R_L
V_GS
V_GS
R_GS
DUT
+
V_DD
-
FIGURE 21. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting
Pad Area
The maximum rated junction temperature, T_JM, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, P_DM, in an
application. Therefore the application’s ambient temperature,
T_A (^oC), and thermal resistance R_θJA (^oC/W) must be
reviewed to ensure that T_JM is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
PDM = ⁽---^T----^J--_Z-^M--_θ----_J-–---_A-^T----^A-----⁾
(EQ. 1)
7
V_DS
t_ON
t_d(ON)
t_r
90%
t_OFF
t_d(OFF)
t_f
90%
10%
0
V_GS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 22. SWITCHING TIME WAVEFORM
In using surface mount devices such as the SOT-223
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of P_DM is
complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.