ISL5416 Datasheet, PDF (69/71 Pages) Intersil Corporation – Four-Channel Wideband Programmable DownConverter

ISL5416
Data Sheet Revisions:
REVISION
6006.2
DATE
January 10, 2003
TABLE 87. REVISION HISTORY
DESCRIPTION
- TRST Pin Description text added for Circuit Board schematics
- Added text in the VGA/RF Attenuator (Range Control) section, last paragraph
- Figure 3, “NCO, Mixer and CIC Block Diagram”, corrected FIR coefficients table
- Figure 4, “FIR1 and FIR2 Block Diagrams”, updated
- Added Power-up Sequencing Explanation on Page 27
- Table 24, IWA = 0*01h, updated register description (bit values remained the same)
- Table 51, IWA = *000h, updated register description (bit values remained the same)
- Table 52, IWA = *001h, bits 31:29, updated description (bit values remained the same)
- Table 52, IWA = *001h, bits 2:0, updated description (bit values remained the same)
- Table 61, IWA = *008h, bit 0 changed to “RESERVED, Set to 0”
- Table 62, “Control Bit Settings for AGC Modes” added
- Table 83, Added the FIR coefficient loading procedure at the bottom of the table
- In Electrical Specifications table added the following values: t_CHR, t_RCY, t_DW
- Figure 12, “Clock Skews”, updated
- Added package drawing note (last page)
CDMA2000-1XRTT:
Figure below shows the overall response using 5-stage CIC filter,
32-tap first FIR filter block and 64-tap second FIR filter block.
-20
-40
-60
-80
-100
-120
1
2
3
4
5
6
7
8
9
10
x 10⁶
FIGURE 21. OVERALL FILTER RESPONSE OF A SINGLE CDMA2000 CHANNEL
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