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| X9455 Datasheet, PDF (6/18 Pages) Intersil Corporation – Dual Two-wiper Digitally-Controlled (XDCP) Potentiometer | |||
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Increment/Decrement Timing
X9455
CS
tCI
SCL
U/D
tCYC
tIL
tIH
tIC
tID
tDI
tCPHS
90% 90%
10%
tCPHNS
tF
tR
DS0, DS1
tIW
RW
(3)
MI
High-Voltage Write Cycle Timing
SYMBOL
tWC
Non-volatile write cycle time
(Notes 5, 8)
PARAMETER
TYP
MAX
UNITS
5
10
ms
XDCP Timing
SYMBOL
PARAMETER
MIN
MAX
UNITS
tWRL (Note 5) SCL rising edge to wiper code changed, wiper response time after instruction
5
issued (all load instructions)
20
µs
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [V(RW(n)(actual))-V(RW(n)(expected))]/MI
V(RW(n)(expected)) = n(V(RH)-V(RL))/255 + V(RL), with n from 0 to 255.
2. Relative linearity is a measure of the error in step size between taps = [V(RW(n+1))-(V(RW(n)) + MI)]/MI, with n from 0 to 254
3. 1 Ml = Minimum Increment = [V(RH)-V(RL)]/255.
4. Typical values are for TA = 25°C and nominal supply voltage.
5. This parameter is not 100% tested.
6. Ratiometric temperature coefficient = (V(RW)T1(n)-V(RW)T2(n))/[V(RW)T1(n)(T1-T2)] x 106, with T1 & T2 being 2 temperatures, and n from 0 to
255.
7. Measured with wiper at tap position 255, RL grounded, using test circuit.
8. tWC is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used. It is the time from a valid
STOP condition at the end of a write sequence of a 2-wire interface write operation, or from the rising edge of CS of a valid âStoreâ operation of
the Up/Down interface, to the end of the self-timed internal nonvolatile write cycle.
9. The recommended power up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power up, the data sheet parameters
for the DCP do not fully apply until tD after VCC reaches its final value. In order to prevent unwanted tap position changes, or an inadvertant
store, bring the CS pin high before or concurrently with the VCC pin on power up.
6
FN8202.0
November 10, 2004
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