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ISL6842 Datasheet, PDF (6/9 Pages) Intersil Corporation – Improved Industry Standard Single Ended Current Mode PWM Controller
ISL6842, ISL6843, ISL6844, ISL6845
Typical Performance Curves
1.02
1.01
1
0.99
0.98
0.97
-40
-10
20
50
80
110
TEMPERATURE (oC)
FIGURE 1. FREQUENCY vs TEMPERATURE
1.001
1
0.999
0.998
0.997
0.996
0.995
-40 -25 -10
5 20 35 50 65 80 95 110
TEMPERATURE (oC)
FIGURE 2. REFERENCE VOLTAGE vs TEMPERATURE
1.002
1
0.998
0.996
0.994
-40 -25 -10 5 20 35 50 65 80 95 110
TEMPERATURE (oC)
FIGURE 3. EA REFERENCE vs TEMPERATURE
Pin Descriptions
RTCT - This is the oscillator timing control pin. The
operational frequency and maximum duty cycle are set by
connecting a resistor, RT, between VREF and this pin and a
timing capacitor, CT, from this pin to GND. The oscillator
produces a sawtooth waveform with a programmable
frequency range up to 2.0MHz. The charge time, TC, the
discharge time, TD, the switching frequency, f, and the
maximum duty cycle, Dmax, can be calculated from the
following equations:
TC ≈ 0.583 • RT • CT
TD ≈ –RT • CT • ln00----..--00---00---88----33----••-----RR----TT------––----42---..--34--
(EQ. 1)
(EQ. 2)
f = 1 ⁄ (TC + TD)
(EQ. 3)
D = TC • f
(EQ. 4)
Figure 4 may be used as a guideline in selecting the
capacitor and resistor values required for a given frequency.
6
1-103
100
10
CT=
100pF
220pF
330pF
470pF
1.0nF
2.2nF
3.3nF
4.7nF
1
10 20 30 40 50 60 70 80 90 100
RT (kΩ)
FIGURE 4. RTCT vs FREQUENCY
COMP - COMP is the output of the error amplifier and the
input of the PWM comparator. The control loop frequency
compensation network is connected between the COMP and
FB pins.
FB - The output voltage feedback is connected to the
inverting input of the error amplifier through this pin. The
non-inverting input of the error amplifier is internally tied to a
reference voltage.
CS - This is the current sense input to the PWM comparator.
The range of the input signal is nominally 0 to 1.0V and has
an internal offset of 100mV.
GND - GND is the power and small signal reference ground
for all functions.
OUT - This is the drive output to the power switching device.
It is a high current output capable of driving the gate of a
power MOSFET with peak currents of 1.0A. This GATE
output is actively held low when VDD is below the UVLO
threshold.