ISL6753_06 Datasheet, PDF (6/15 Pages) Intersil Corporation – ZVS Full-Bridge PWM Controller

ISL6753
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, T_A = -40°C to 105°C (Note 3), Typical values are at
T_A = 25°C (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CTBUF VOL
SOFT-START
∆V(I_LOAD = 2mA, I_LOAD = 0mA),
-
V_CT = 0.8V
-
0.10
V
Charging Current
SS = 3V
-60
-70
-80
µA
SS Clamp Voltage
4.410
4.500
4.590
V
SS Discharge Current
SS = 2V
10
-
-
mA
Reset Threshold Voltage
OUTPUTS
T_A = 25°C
0.23
0.27
0.33
V
High Level Output Voltage (VOH)
Low Level Output Voltage (VOL)
Rise Time
Fall Time
UVLO Output Voltage Clamp
THERMAL PROTECTION
I_OUT = -10mA, VDD - VOH
-
I_OUT = 10mA, VOL - GND
-
C_OUT = 220pF, VDD = 15V(Note 4)
-
C_OUT = 220pF, VDD = 15V(Note 4)
-
VDD = 7V, I_LOAD = 1mA (Note 6)
-
0.5
1.0
V
0.5
1.0
V
110
200
ns
90
150
ns
-
1.25
V
Thermal Shutdown
(Note 4)
130
140
150
°C
Thermal Shutdown Clear
(Note 4)
115
125
135
°C
Hysteresis, Internal Protection
(Note 4)
-
15
-
°C
NOTES:
3. Specifications at -40°C and 105°C are guaranteed by 25°C test with margin limits.
4. Guaranteed by design, not 100% tested in production.
5. This is the maximum duty cycle achievable using the specified values of RTD and CT. Larger or smaller maximum duty cycles may be obtained
using other values for these components. See Equations 1 - 5.
6. Adjust VDD below the UVLO stop threshold prior to setting at 7V.
6
FN9182.2
April 4, 2006