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ISL6752_14 Datasheet, PDF (6/16 Pages) Intersil Corporation – ZVS Full-Bridge Current-Mode PWM with Adjustable Synchronous Rectifier Control
ISL6752
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2
and “Typical Application - High Voltage Input Primary Side Control ZVS Full-Bridge Converter” on page 3 and
“Typical Application - High Voltage Input Secondary Side Control ZVS Full-Bridge Converter” on page 4.
9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, TA = -40°C to +105°C, Typical values are at TA = +25°C;
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature
limits established by characterization and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Maximum Duty Cycle (Per Half-cycle)
VERR = 4.20V, VCS = 0V (Note 4)
-
94
-
%
RTD = 2.00kΩ, CT = 220pF
-
97
-
%
RTD = 2.00kΩ, CT = 470pF
-
99
-
%
Zero Duty Cycle VERR Voltage
0.85
-
1.20
V
VERR to PWM Comparator Input Offset
VERR to PWM Comparator Input Gain
TA = +25°C
0.7
0.8
0.9
V
0.31
0.33
0.35
V/V
Common Mode (CM) Input Range
(Note 3)
0
-
4.45
V
OSCILLATOR
Frequency Accuracy, Overall
(Note 3)
165
183
201
kHz
-10
-
10
%
Frequency Variation with VDD
Temperature Stability
Charge Current
Discharge Current Gain
TA = +25°C, (F20V- - F10V)/F10V
VDD = 10V, |F-40°C - F0°C|/F0°C
|F0°C - F105°C|/F25°C (Note 3)
TA = +25°C
-
-
-
-193
19
0.3
4.5
1.5
-200
20
1.7
-
-
-207
23
%
%
%
µA
µA/µA
CT Valley Voltage
Static Threshold
0.75
0.80
0.88
V
CT Peak Voltage
Static Threshold
2.75
2.80
2.88
V
CT Pk-Pk Voltage
Static Value
1.92
2.00
2.05
V
RTD Voltage
1.97
2.00
2.03
V
RESDEL Voltage Range
0
-
2.00
V
CTBUF Gain (VCTBUFp-p/VCTp-p)
CTBUF Offset from GND
CTBUF VOH
CTBUF VOL
OUTPUT
VCT = 0.8V, 2.6V
VCT = 0.8V
ΔV(ILOAD = 0mA, ILOAD = -2mA),
VCT = 2.6V
ΔV(ILOAD = 2mA, ILOAD = 0mA),
VCT = 0.8V
1.95
2.0
2.05
V/V
0.34
0.40
0.44
V
-
-
0.10
V
-
-
0.10
V
High Level Output Voltage (VOH)
IOUT = -10mA, VDD - VOH
-
0.5
1.0
V
Low Level Output Voltage (VOL)
IOUT = 10mA, VOL - GND
-
0.5
1.0
V
Rise Time
COUT = 220pF, VDD = 15V (Note 3)
-
110
200
ns
Fall Time
COUT = 220pF, VDD = 15V (Note 3)
-
90
150
ns
UVLO Output Voltage Clamp
VDD = 7V, ILOAD = 1mA (Note 5)
-
-
1.25
V
Output Delay/Advance Range
OUTLLN/OUTLRN relative to OUTLL/OUTLR
VADJ = 2.50V (Note 3)
VADJ < 2.425V
-
-
3
ns
-40
-
-300
ns
VADJ > 2.575V
40
-
300
ns
Delay/Advance Control Voltage Range
OUTLLN/OUTLRN relative to OUTLL/OUTLR
OUTLxN Delayed
OUTLxN Advanced
2.575
-
5.000
V
0
-
2.425
V
6
FN9181.3
October 31, 2008