ISL6612B Datasheet, PDF (6/12 Pages) Intersil Corporation – Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP

ISL6612B, ISL6613B
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Three-State Upper Gate Rising Threshold
VCC = 12V
Three-State Upper Gate Falling Threshold
VCC = 12V
Shutdown Holdoff Time
t_TSSHD
-
UGATE Rise Time
t_RU
V_PVCC = 12V, 3nF Load, 10% to 90%
-
LGATE Rise Time
t_RL
V_PVCC = 12V, 3nF Load, 10% to 90%
-
UGATE Fall Time
t_FU
V_PVCC = 12V, 3nF Load, 90% to 10%
-
LGATE Fall Time
t_FL
V_PVCC = 12V, 3nF Load, 90% to 10%
-
UGATE Turn-On Propagation Delay (Note 4)
t_PDHU V_PVCC = 12V, 3nF Load, Adaptive
-
LGATE Turn-On Propagation Delay (Note 4)
t_PDHL
V_PVCC = 12V, 3nF Load, Adaptive
-
UGATE Turn-Off Propagation Delay (Note 4)
t_PDLU
V_PVCC = 12V, 3nF Load
-
LGATE Turn-Off Propagation Delay (Note 4)
t_PDLL
V_PVCC = 12V, 3nF Load
-
LG/UG Three-State Propagation Delay (Note 4)
t_PDTS
V_PVCC = 12V, 3nF Load
-
OUTPUT (Note 4)
Upper Drive Source Current
I_{U_SOURCE} V_PVCC = 12V, 3nF Load
-
Upper Drive Source Impedance
R_{U_SOURCE} 150mA Source Current
1.25
Upper Drive Sink Current
I_{U_SINK} V_PVCC = 12V, 3nF Load
-
Upper Drive DC Sink Impedance
R_{U_SINK} 150mA Source Current
.9
Lower Drive Source Current
I_{L_SOURCE} V_PVCC = 12V, 3nF Load
-
Lower Drive Source Impedance
R_{L_SOURCE} 150mA Source Current
0.85
Lower Drive Sink Current
I_{L_SINK} V_PVCC = 12V, 3nF Load
-
Lower Drive Sink Impedance
R_{L_SINK} 150mA Sink Current
0.60
NOTE:
4. Guaranteed by design. Not 100% tested in production.
TYP
3.20
2.60
245
26
18
18
12
10
10
10
10
10
1.25
2.0
2
1.6
2
1.35
3
0.80
MAX
-
-
-
-
-
-
-
-
-
-
UNITS
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
Α
3.0
Ω
-
Α
3.0
Ω
-
A
2.2
Ω
-
A
1.35
Ω
Functional Pin Description
PACKAGE PIN #
PIN
SOIC DFN SYMBOL
FUNCTION
1
1
UGATE Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
2
2
BOOT Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in choosing the capacitor value.
-
3, 8
N/C No Connection.
3
4
PWM The PWM signal is the control input for the driver. The PWM signal can enter three distinct states during operation, see
the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the
controller.
4
5
GND Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver.
5
6
LGATE Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
6
7
VCC Connect this pin to a +12V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND.
7
9
PVCC This pin supplies power to both upper and lower gate drives in ISL6613B; only the lower gate drive in ISL6612B.
Its operating range is +5V to 12V. Place a high quality low ESR ceramic capacitor from this pin to GND.
8
10
PHASE Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides
a return path for the upper gate drive.
9
11
PAD Connect this pad to the power ground plane (GND) via thermally enhanced connection.
6
FN9205.3
July 27, 2006