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ISL6526_07 Datasheet, PDF (6/15 Pages) Intersil Corporation – Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
ISL6526, ISL6526A
Electrical Specifications Recommended Operating Conditions, unless otherwise noted VCC = 3.3V ±5% and TA = +25°C (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION/DISABLE
IUGATE-SRC VBOOT - VPHASE = 5V, VUGATE = 4V
IUGATE-SNK
ILGATE-SRC VVCC = 3.3V, VLGATE = 4V
ILGATE-SNK
-
-1
-
A
-
1
-
A
-
-1
-
A
-
2
-
A
OCSET Current Source
IOCSET
Commercial
Industrial
18
20
22
μA
16
20
22
μA
Disable Threshold
VDISABLE
-
-
0.8
V
Functional Pin Description
14 LEAD (SOIC)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 ENABLE
8 COMP
16 LEAD 5X5 (QFN)
TOP VIEW
16 15 14 13
CPVOUT 1
CT1 2
CT2 3
OCSET 4
12 PHASE
11 VCC
10 CPGND
9 NC
5678
VCC
This pin provides the bias supply for the ISL6526, ISL6526A.
Connect a well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
output. These pins are used to compensate the voltage-
control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the upper
MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the lower
MOSFET has turned off.
OCSET
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET (VIN). ROCSET, an internal 20μA current
source (IOCSET), and the upper MOSFET on-resistance
(rDS(ON)) set the converter overcurrent (OC) trip point
according to the following equation:
IPEAK
=
I--O-----C----S----E----T----x---R-----O----C----S----E----T--
rDS(ON)
(EQ. 1)
An overcurrent trip cycles the soft-start function.
6
FN9055.8
March 20, 2007