ISL6506BIBZ Datasheet, PDF (6/8 Pages) Intersil Corporation – Multiple Linear Power Controller with ACPI Control Interface

ISL6506BIBZ
properly decoupled). The pass transistors should be placed
on pads capable of heatsinking matching the device’s power
dissipation. Where applicable, multiple via connections to a
large internal plane can significantly lower localized device
temperature rise.
Placement of the decoupling and bulk capacitors should
reflect their purpose. As such, the high-frequency
decoupling capacitors should be placed as close as possible
to the load they are decoupling; the ones decoupling the
controller close to the controller pins, the ones decoupling
the load close to the load connector or the load itself (if
embedded). Even though bulk capacitance (aluminum
electrolytics or tantalum capacitors) placement is not as
critical as the high-frequency capacitor placement, having
these capacitors close to the load they serve is preferable.
Locate all small signal components close to the respective
pins of the control IC, and connect them to ground, if
applicable, through a via placed close to the ground pad.
12VATX
5VSB
CIN
C_5VSB
+3.3VIN
VCC
5VDLSB
Q3
5VDUAL
ISL6506BIBZ ^C5V
Q2
3V3DUAL
C_HF3V C_3V
DLA
3V3AUX
GND EPAD
C_HF5V
Q4
5VATX
KEY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
VIA CONNECTION TO GROUND PLANE
FIGURE 4. PRINTED CIRCUIT BOARD ISLANDS
A multi-layer printed circuit board is recommended.
Figure 4 shows the connections to most of the components
in the circuit. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. The EPAD should be
tied to the ground plane with three to five vias for good
thermal management. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Ideally, the power plane should
support both the input power and output power nodes. Use
copper filled polygons on the top and bottom circuit layers to
create power islands connecting the filtering components
(output capacitors) and the loads. Use the remaining printed
circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors should be selected to allow the output
voltage to meet the dynamic regulation requirements of
active state operation (S0/S1). The load transient for the
various microprocessor system’s components may require
high quality capacitors to supply the high slew rate (di/dt)
current demands. Thus, it is recommended that the output
capacitors be selected for transient load regulation, paying
attention to their parasitic components (ESR, ESL).
Also, during the transition between active and sleep states
on the 5V_DUAL output, there is a short interval of time during
which none of the power pass elements are conducting.
During this time the output capacitors have to supply all the
output current. The output voltage drop during this brief
period of time can be easily approximated using Equation 1:
ΔV _{O U T}
=
I_OUT
×
⎛
⎜E
⎝
S
R_OUT
+
C^-----_O^--t--t-_U^----_T^-_{⎠⎟⎞}
(EQ. 1)
where:
ΔV_OUT = output voltage drop
ESR_OUT = output capacitor bank ESR
I_OUT = output current during transition
C_OUT = output capacitor bank capacitance
t_t = active-to-sleep/sleep-to-active transition time (10µs
typical)
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
Input Capacitors Selection
The input capacitors for an ISL6506BIBZ application must
have a sufficiently low ESR so as not to allow the input
voltage to dip excessively when energy is transferred to the
output capacitors. If the ATX supply does not meet the
specifications, certain imbalances between the ATX’s
outputs and the ISL6506BIBZ’s regulation levels could have
as a result a brisk transfer of energy from the input
capacitors to the supplied outputs. At the transition between
active and sleep states, such phenomena could be
responsible for the 5V_SB voltage drooping excessively and
affecting the output regulation. The solution to such a
potential problem is using larger input capacitors with a
lower total combined ESR.
6
FN7814.0
June 8, 2011