ISL54504 Datasheet, PDF (6/12 Pages) Intersil Corporation – +1.8V to +5.5V, 2.5OHM, Single SPST Analog Switches

ISL54504, ISL54505
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
SWITCH
INPUT
V_NO
SWITCH
OUTPUT _0V
50%
t_OFF
V_OUT
90%
t_ON
t_r < 20ns
t_f < 20ns
90%
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO OR NC
IN
GND
COM
V_OUT
R_L
50Ω
C_L
35pF
Logic input waveform is inverted for switches that have the
opposite logic sense.
Repeat test for all switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
-----------^R-----^L------------
R_L + r_(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
V_OUT
LOGIC ^ON
INPUT
ΔV_OUT
OFF
Q = ΔV_OUT x C_L
V_INH
ON
V_INL
R_G
NO OR NC
COM
V_G
GND
IN
LOGIC
INPUT
V_OUT
C_L
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
SIGNAL
GENERATOR
ANALYZER
R_L
V+
C
NO OR NC
IN 0V OR V+
COM
GND
FIGURE 3. OFF ISOLATION TEST CIRCUIT
r_ON = V₁/I₁ ^*
V+
C
V_NX
I₁
100mA
NO OR NC
V₁
IN ^{VINL OR VINH}
COM
GND
* _{I1 = 10mA AT V+ = 1.8V}
FIGURE 4. r_ON TEST CIRCUIT
6
FN6552.2
October 23, 2009