ISL45042 Datasheet, PDF (6/8 Pages) Intersil Corporation – LCD Module Calibrator

ISL45042
Table 1 gives the calculated value of V_OUT for resistors
values of: R_SET = 24.9kΩ, R₁ = 200kΩ, R₂ = 243kΩ and
A_VDD = 10V.
TABLE 1. CALCULATED VCOM OUTPUT VOLTAGES
SETTING VALUE
1
V_OUT
5.468
10
5.313
20
5.141
30
4.969
40
4.797
50
4.625
60
4.453
70
4.281
80
4.109
90
3.936
100
3.764
110
3.592
128
3.282
R_SET Resistor
The external R_SET resistor sets the full-scale sink current that
determines the lowest voltage of the external voltage divider R₁
and R₂ (see Figure 1). The voltage difference between the
V_OUT pin and I_SET pin (see Figure 5) has to be greater than
1.75V. This will keep the output MOS transistor in the saturation
region. Expected current settings and 7-bit accuracy occurs
when the output MOS transistor is operating in the saturation
region. Figure 5 shows the internal connection for the output
MOS transistor. The value of the AV_DD supply sets the voltage
at the source of the output transistor. This voltage is equal to
(Setting/128) x (AV_DD/20). The I_SET current is therefore equal
to (Setting/128) x (AV_DD/20 x R_SET). The value of the Drain
voltage is found using Equation 2. The values of R₁ and R₂ in
Equation 2, should be determined (setting equal to 128) so the
minimum value of V_OUT is greater than 1.75V + AV_DD/20.
S-----E----T-----T----I--N-----G--- _x ^{A-----V-----D----D---}
128
20
VOUT PIN ^{AVDD = 15V}
R1
AVDD
VSAT
R2
0.5V
RSET
ISET PIN
FIGURE 5. OUTPUT CONNECTION CIRCUIT EXAMPLE
Power Supply Sequence
The recommendation for power supply sequence would be
to power down the part first (V_DD, AV_DD), after 100ms if
programming has occurred, and then power-down the
control power supplies (CTL, CE).
Verifying the Programmed Value
The following sequence can be used to verify the
programmed value without having to sequence the V_DD
supply. To verify the programmed value, follow the following
steps. The ISL45042 will read memory contents and be set
to that value when the CE pin is grounded.
1. Power-up the ISL45042.
2. CE pin = V_DD.
3. Change counter value with CTL pin to desired value.
4. CTL = more than 4.9V and 200ms. Counter value
programmed.
5. Change the counter value with CTL pin to a different
value.
6. CE pin = Ground.
7. Check that the output value is the one programmed in
Step 4.
Generating VDD and CE supply from a Larger
Voltage Source
The CE pin has an internal pull-down resistor (see
R_INTERNAL in Figure 6). The impedance of this resistor is
400kΩ to 500kΩ. If your design is using a resistor divider
network to generate the 3.3V supply (for both V_DD and CE to
enable programming) from a larger voltage source, the
400kΩ (worst case) resistor needs to be taken into account
as a parallel resistance when the CE pin is connected to this
source. Another design concern is to be able to provide
enough supply current during programming. The ISL45042
draws about 2mA during this process. Recommended
resistor values are shown in Figure 6. This design will result
in an additional 0.83mA quiescent current flowing through
resistors R_A and R_B.
V_CC = 5V
R_A
ISL45042
2kΩ
CE
VCE
CE LOGIC
R_B
4kΩ
R_INTERNAL = 400kΩ to 500kΩ
FIGURE 6. APPLICATION GENERATING VDD AND VCE
VOLTAGES
6
FN6072.8
July 9, 2008