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ISL12029 Datasheet, PDF (6/28 Pages) Intersil Corporation – Real Time Clock/Calendar with EEPROM
ISL12029
Serial Interface (I2C) Specifications (Continued)
DC/AC Characteristics
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
tHIGH Clock HIGH Time
Measured at the 70% of VDD
600
crossing.
tSU:STA START Condition Setup Time
tHD:STA START Condition Hold Time
tSU:DAT Input Data Setup Time
tHD:DAT Input Data Hold Time
tSU:STO STOP Condition Setup Time
tHD:STO STOP Condition Hold Time for
Read, or Volatile Only Write
tDH
Output Data Hold Time
tR
SDA and SCL Rise Time
SCL rising edge to SDA falling
edge. Both crossing 70% of VDD.
From SDA falling edge crossing
30% of VDD to SCL falling edge
crossing 70% of VDD.
From SDA exiting the 30% to
70% of VDD window, to SCL rising
edge crossing 30% of VDD
From SCL falling edge crossing
70% of VDD to SDA entering the
30% to 70% of VDD window.
From SCL rising edge crossing
70% of VDD, to SDA rising edge
crossing 30% of VDD.
From SDA rising edge to SCL
falling edge. Both crossing 70%
of VDD.
From SCL falling edge crossing
30% of VDD, until SDA enters the
30% to 70% of VDD window.
From 30% to 70% of VDD
600
600
100
0
600
600
0
20 +
0.1 x Cb
tF
SDA and SCL Fall Time
From 70% to 30% of VDD
20 +
0.1 x Cb
Cb
Capacitive Loading of SDA or SCL Total on-chip and off-chip
10
Cpin SDA, and SCL Pin Capacitance
tWC Non-Volatile Write Cycle Time
12
MAX
UNITS
ns
NOTES
ns
ns
ns
ns
ns
ns
ns
250
ns
250
ns
400
pF
10
pF
20
ms
10
NOTES:
3. IRQ/FOUT Inactive (no frequency output and no alarms).
4. VIL = VDD x 0.1, VIH = VDD x 0.9, fSCL = 400kHz.
5. VRESET = 2.63V (VDD must be greater than VRESET), VBAT = 0V.
6. Bit BSW = 0 (Standard Mode), VBAT ≥ 1.8V.
7. Specified at +25°C.
8. In order to ensure proper timekeeping, the VDD SR- specification must be followed.
9. Parameter is not 100% tested.
10. tWC is the minimum cycle time to be allowed for any non-volatile Write by the user, it is the time from valid STOP condition at the end of Write
sequence of a serial interface Write operation, to the end of the self-timed internal non-volatile write cycle.
6
FN6206.6
October 18, 2006