ISL12029 Datasheet, PDF (24/28 Pages) Intersil Corporation – Real Time Clock/Calendar with EEPROM

ISL12029
Oscillator Measurements
When a proper crystal is selected and the layout guidelines
above are observed, the oscillator should start up in most
circuits in less than one second. Some circuits may take slightly
longer, but startup should definitely occur in less than 5
seconds. When testing RTC circuits, the most common impulse
is to apply a scope probe to the circuit at the X2 pin (oscillator
output) and observe the waveform. DO NOT DO THIS!
Although in some cases you may see a usable waveform, due
to the parasitics (usually 10pF to ground) applied with the
scope probe, there will be no useful information in that
waveform other than the fact that the circuit is oscillating. The
X2 output is sensitive to capacitive impedance so the voltage
levels and the frequency will be affected by the parasitic
elements in the scope probe. Applying a scope probe can
possibly cause a faulty oscillator to start up, hiding other issues
(although in the Intersil RTCs, the internal circuitry assures
startup when using the proper crystal and layout).
The best way to analyze the RTC circuit is to power it up and
read the real time clock as time advances, or if the chip has
the IRQ/F_OUT output, look at the output of that pin on an
oscilloscope (after enabling it with the control register, and
using a pull-up resistor for the open-drain output).
Alternatively, the ISL12029 IRQ/F_OUT- output can be
checked by setting an alarm for each minute. Using the
pulse interrupt mode setting, the once-per-minute interrupt
functions as an indication of proper oscillation.
Backup Battery Operation
Many types of batteries can be used with the Intersil RTC
products. 3.0V or 3.6V Lithium batteries are appropriate, and
sizes are available that can power a Intersil RTC device for up
to 10 years. Another option is to use a super capacitor for
applications where V_DD may disappear intermittently for short
periods of time. Depending on the value of super capacitor
used, backup time can last from a few days to two weeks (with
>1F). A simple silicon or Schottky barrier diode can be used in
series with V_DD to charge the super capacitor, which is
connected to the V_BAT pin. Try to use Schottky diodes with
very low leakages, <1µA desirable. Do not use the diode to
charge a battery (especially lithium batteries!).
There are two possible modes for battery backup operation,
Standard and Legacy mode. In Standard mode, there are no
operational concerns when switching over to battery backup
since all other devices functions are disabled. Battery drain
is minimal in Standard mode, and return to Normal V_DD
powered operation is predictable. In Legacy modes the V_BAT
pin can power the chip if the voltage is above V_DD and
V_TRIP. This makes it possible to generate alarms and
communicate with the device under battery backup, but the
supply current drain is much higher than the Standard mode
and backup time is reduced. In this case if alarms are used
in backup mode, the IRQ/F_OUT pull up resistor must be
connected to V_BAT voltage source. During initial power-up
the default mode is the Standard mode.
2.7-5.5V
V_CC
V_back
V_SS
Supercapacitor
FIGURE 28. SUPERCAPACITOR CHARGING CIRCUIT
I²C Communications During Battery Backup and
LVR Operation
Operation in Battery Backup mode and LVR is affected by
the BSW and SBIB bits as described earlier. These bits allow
flexible operation of the serial bus and EEPROM in battery
backup mode, but certain operational details need to be
clear before utilizing the different modes. The most
significant detail is that once VDD goes below VRESET, then
I²C communications cease regardless of whether the device
is programmed for I²C operation in battery backup mode.
Table 10 describes 4 different modes possible with using the
BSW and SBIB bits, and how they are affect LVR and battery
backup operation.
• Mode A - In this mode selection bits indicate a low VDD
switchover combined with I²C operation in battery backup
mode. In actuality the VDD will go below V_RESET before
switching to battery backup, which will disable I²C
ANYTIME the device goes into battery backup mode.
Regardless of the battery voltage, the I²C will work down
to the V_RESET voltage (See Figure 29).
• Mode B - In this mode the selection bits indicate
switchover to battery backup at V_DD<V_BAT, and I²C
communications in battery backup. In order to
communicate in battery backup mode, the V_RESET voltage
must be less than the VBAT voltage AND V_DD must be
greater than V_RESET. Also, pull-ups on the I²C bus pins
must go to V_BAT to communicate. This mode is the same
as the normal operating mode of the X1228 device
• Mode C - In this mode the selection bits indicate a low
VDD switchover combined with no communications in
battery backup. Operation is actually identical to Mode A
with I²C communications down to V_DD = V_RESET, then no
communications (see Figure 29).
• Mode D - In this mode the selection bits indicate
switchover to battery backup at V_DD<V_BAT, and no I²C
communications in battery backup. This mode is unique in
that there is I²C communication as long as VDD is higher
than VRESET or VBAT, whichever is greater. This mode is
the safest for guaranteeing I²C communications only when
there is a Valid V_DD. (see Figure 30)
24
FN6206.6
October 18, 2006